Proceedings ArticleDOI
A CMOS switched-current filter technique
Terri S. Fiez,David J. Allstot +1 more
- pp 206-207
TLDR
In this article, a five-pole lowpass Chebyshev SI filter has been integrated in a 2- mu m N-well, double-metal CMOS technology, with the average die area being about 200 mil/sup 2/ per SI pole.Abstract:
Basic design techniques and considerations for switched-current (SI) circuits are presented, and experimental results from integrated filters are given. By means of analogies to switched-capacitor circuits, a five-pole lowpass Chebyshev SI filter has been integrated in a 2- mu m N-well, double-metal CMOS technology. The average die area is about 200 mil/sup 2/ per SI pole. The current mirror gain factors were derived by means of signal flow-graph techniques starting with the RLC prototype. A doubly terminated five-pole Chebyshev filter was designed for a 0.1-dB ripple bandwidth of 5 kHz with a sampling frequency of 128 kHz. The measured response is shown. The noise floor is about 70 dB down with respect to the passband. A three-pole elliptic SI filter has also been integrated to illustrate the realization of transmission zeros with SI filter techniques. >read more
Citations
More filters
Journal ArticleDOI
Switched-current circuit design issues
TL;DR: Switched-current (SI) circuits represent a current-mode analog sampled-data signal processing technique realizable in standard digital CMOS technologies as discussed by the authors, where a voltage is sampled onto the gate of a MOSFET and held on its noncritical gate capacitance.
Journal ArticleDOI
CMOS switched-current ladder filters
Terri S. Fiez,David J. Allstot +1 more
TL;DR: In this paper, the design and implementation of switched-current (SI) ladder filters is described. But the SI integrator/summer is shown to be directly analogous to the switched-capacitor (SC) Integrator/Summer; thus, all the synthesis techniques developed for the design of SC filters can be used to synthesize SI filters.
Proceedings ArticleDOI
Current-feedthrough effects and cancellation techniques in switched-current circuits
TL;DR: A replication-based current feedthrough cancellation technique that reduces the clock-feedthrough current more than 20 dB is proposed and SPICE simulation results for this circuit are given.
Journal ArticleDOI
A clock feedthrough reduction circuit for switched-current systems
TL;DR: The simulation and the experimental results of the proposed circuit reveal a reduction of clock feedthrough errors in comparison with conventional circuits.
Proceedings ArticleDOI
Signal-dependent clock-feedthrough cancellation in switched-current circuits
TL;DR: In this paper, the authors developed three schemes for cancelling the signal-dependent clock-feedthrough in switched-current circuits based on replicating the current track-and-hold to produce an output current with less than 0.03% THD.
References
More filters
Proceedings ArticleDOI
Switched currents-a new technique for analog sampled-data signal processing
TL;DR: A technique called 'switched currents,' for analog sampled-data signal processing in the current domain, is introduced and a family of modules that are capable of various computational and memory functions is described.
Journal ArticleDOI
Design techniques for MOS switched capacitor ladder filters
TL;DR: In this paper, the authors describe design techniques for monolithic, high-precision, MOS sampled-data active-ladder filters, which are used to simulate doubly terminated LC ladder networks.