Proceedings ArticleDOI
A Commercial Field-Programmable Dense eFUSE Array Memory with 99.999% Sense Yield for 45nm SOI CMOS
Gregory J. Uhlmann,T. Aipperspach,Toshiaki Kirihata,K. Chandrasekharan,Yan Zun Li,Chris Paone,B. Reed,Norman Robson,John M. Safran,D. Schmitt,S.S. Iyer +10 more
- pp 406-407
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TLDR
A second-generation one-time programmable read-only memory (OTPROM) that provides these features through a balanced bitline, resistor pull-up, differential sense amp with a programmable reference is described.Abstract:
This paper describes a second-generation one-time programmable read-only memory (OTPROM) that provides these features through a balanced bitline, resistor pull-up, differential sense amp with a programmable reference.read more
Citations
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Patent
Programmable Resistive Device and Memory Using Diode as Selector
TL;DR: In this article, a programmable resistive memory can be configured to be programmable by applying voltages to conduct current flowing through the programmable resistor element to change its resistance for a different logic state.
Journal ArticleDOI
An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory
Meng-Fan Chang,Shin-Jang Shen,Chia-Chi Liu,Che-Wei Wu,Yu-Fan Lin,Ya-Chin King,Chorng-Jung Lin,Hung-jen Liao,Yu-Der Chih,Hiroyuki Yamauchi +9 more
TL;DR: This study proposes a new current-sampling-based SA (CSB-SA) to suppress the offset due to device mismatch, while maintaining tolerance for insufficient precharge time, and achieves a read speed 6.3 ×-8.1× faster than previous SAs.
Patent
Circuit and system of using FinFET for building programmable resistive devices
TL;DR: In this article, junction diodes or MOS devices fabricated in standard FinFET technologies can be used as program selectors or OTP element in a programmable resistive device, such as interconnect fuse, contact/via fuse, anti-fuse, or emerging nonvolatile memory such as MRAM, PCRAM, CBRAM, or RRAM.
Patent
Multiple-Bit Programmable Resistive Memory Using Diode as Program Selector
TL;DR: In this article, a method and system for multiple-bit programmable resistive cells with a diode as program selector is described. But the first and second terminals of the diode can be fabricated from source/drain of MOS in a well for MOS devices or fabricated on the same polysilicon structure.
Patent
System and method of in-system repairs or configurations for memories
TL;DR: In this paper, a memory chip can include at least one OTP memory to store defective addresses that are to be repaired, without requiring additional I/O pins or high voltage supplies for reading or programming.
References
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Journal ArticleDOI
Electrically programmable fuse (eFUSE) using electromigration in silicides
TL;DR: In this article, the authors describe a positive application of electromigration, as an electrically programmable fuse device (eFUSE), which shows a large increase in resistance that enable easy sensing.
Proceedings ArticleDOI
Electrically Programmable Fuse (eFUSE): From Memory Redundancy to Autonomic Chips
Norman Robson,John M. Safran,Chandrasekharan Kothandaraman,Alberto Cestero,Xiang Chen,R. Rajeevakumar,Alan J. Leslie,Dan Moy,T. Kirihata,Subramanian S. Iyer +9 more
TL;DR: The evolution and applications of electrical fuse solutions for 180 nm to 45 nm technologies at IBM are reviewed, and some insight into future uses in 32 nm technology and beyond with the eFUSE as a building block for the autonomic chip of the future is provided.
Proceedings ArticleDOI
A Compact eFUSE Programmable Array Memory for SOI CMOS
John M. Safran,Alan J. Leslie,Gregory J. Fredeman,Chandrasekharan Kothandaraman,Alberto Cestero,Xiang Chen,R. Rajeevakumar,Deok-kee Kim,Yan Zun Li,Dan Moy,Norman Robson,T. Kirihata,S. S. Iyer +12 more
TL;DR: A compact eFUSE programmable array memory configured as a 4 Kb one-time programmable ROM (OTPROM) is presented, demonstrating a >10X density increase over traditional VLSI fuse circuits.
Journal ArticleDOI
IBM System z9 eFUSE applications and methodology
Richard F. Rizzolo,T. G. Foote,J. M. Crafts,D. A. Grosch,T. O. Leung,D. J. Lund,B. L. Mechtly,Bryan J. Robbins,T. J. Slegel,M. J. Tremblay,G. A. Wiedemeier +10 more
TL;DR: The physical and logical implementation of eFUSEs has resulted in improved yield at wafer, module, and final assembly test levels, and has provided additional flexibility in logic function and in system use.
Journal ArticleDOI
A 500-MHz multi-banked compilable DRAM macro with direct write and programmable pipelining
John E. Barth,Darren L. Anand,S. Burns,Jeffrey H. Dreibelbis,John A. Fifield,Kevin W. Gorman,Michael R. Nelms,Erik A. Nelson,Adrian J. Paparelli,G. Pomichter,Dale E. Pontius,S. Sliva +11 more
TL;DR: This work describes a 500-MHz compiled eDRAM macro offered in a 90-nm logic-based process that is optimized for high bandwidth while enabling compilation in bank and data-word dimensions and modified to support direct write and piping.