Proceedings ArticleDOI
A hierarchical constraint graph generation and compaction system for symbolic layout
A.A.J. de Lange,J.S.J. de Lange,J.F. Vink +2 more
- pp 532-535
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TLDR
A novel approach and system for graph-oriented layout compaction for large symbolic layout designs is presented and further reduction of the complexity of graph generation and compaction is achieved by setting only local constraints in the graphs, which requires an iterative graph-generation/compaction scheme.Abstract:
A novel approach and system for graph-oriented layout compaction for large symbolic layout designs is presented. Hierarchical compaction is performed by generating geometrical interfaces for compacted subcells which are used as rigid nodes in graphs at higher hierarchical levels. Further reduction of the complexity of graph generation and compaction is achieved by setting only local constraints in the graphs, which requires an iterative graph-generation/compaction scheme. >read more
Citations
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Apparatus and method of supporting functional design of logic circuit and apparatus and method of verifying functional design of logic circuit
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References
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Proceedings ArticleDOI
Symbolic layout compaction review
TL;DR: The two most frequently used symbolic layout compaction approaches, constraint graph compaction and virtual grid compaction, are reviewed in this paper.
Proceedings ArticleDOI
Improved Compaction by Minimized Length of Wires
TL;DR: The compaction of IC or hybrid layouts by means of the "longest path" method yields a slack in the placement of part of the elements, which can be used to reduce the overall wire-length, leading to an improved electrical performance and a smaller layout.
Proceedings ArticleDOI
A Hiererachical, Error-Tolerant Compactor
TL;DR: A compactor that is practical for compacting whole chips that are designed hierarchically, and can produce a reasonable result in spite of the layout being over-constrained is described.
Proceedings ArticleDOI
Graph-Optimization Techniques for IC Layout and Compaction
Gershon Kedem,Hiroyuki Watanabe +1 more
TL;DR: A graph based optimization algorithm is used to solve the compaction problem of a very special form and could be used either as an aid to hand layout or as the bottom part of an automatic layout generation program.
Journal ArticleDOI
Automatic design rule adaptation of leaf cell layouts
TL;DR: With the example of the buried contact it is shown that even relatively complex design rule requirements may be met and the inconsistent constraint cycles are broken by a fast jog generation algorithm.