A robust digital baseband predistorter constructed using memory polynomials

TLDR: A memory polynomial model for the predistorter is proposed and implemented using an indirect learning architecture and linearization performance is demonstrated on a three-carrier WCDMA signal.

Abstract: Power amplifiers (PAs) are inherently nonlinear devices and are used in virtually all communications systems. Digital baseband predistortion is a highly cost-effective way to linearize PAs, but most existing architectures assume that the PA has a memoryless nonlinearity. For wider bandwidth applications such as wideband code-division multiple access (WCDMA) or wideband orthogonal frequency-division multiplexing (W-OFDM), PA memory effects can no longer be ignored, and memoryless predistortion has limited effectiveness. In this paper, instead of focusing on a particular PA model and building a corresponding predistorter, we focus directly on the predistorter structure. In particular, we propose a memory polynomial model for the predistorter and implement it using an indirect learning architecture. Linearization performance is demonstrated on a three-carrier WCDMA signal.