Proceedings ArticleDOI
Accurate Back-of-the-Envelope Transistor Model for Deep Sub-micron MOS
Zhenyu Qi,Mircea R. Stan +1 more
- pp 75-76
TLDR
This paper presents a new transistor model for modern deep sub-micron technologies where most existing textbook models fail and is shown to be more accurate than the power law models in both linear and saturation regions.Abstract:
This paper presents a new transistor model for modern deep sub-micron technologies where most existing textbook models fail. With only seven independent parameters in total the model is shown to be more accurate than the power law models in both linear and saturation regions. Up to 43% matching error reduction is observed with an industrial 90 nm technology. Moreover the model is first-order continuous. All these features make it attractive both for education and design analysis.read more
Citations
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Journal Article
A Simple General-purpose I-V Model for All Operating Modes of Deep Submicron MOSFETs
TL;DR: A simple general-purpose I-V model for all operating modes of deep-submicron MOSFETs is presented and the tolerance of the model accuracy against parameters variation is investigated.
Dissertation
Study the Performance Analysis of Multi Walled Carbon Nanotube Based VLSI Interconnects
Mohit,Mayank Kumar Rai +1 more
Book ChapterDOI
Reducing Design Margins by Adaptive Compensation for Thermal and Aging Variations
TL;DR: This chapter presents an adaptive threshold compensation scheme using a transimpedance amplifier and adaptive body biasing to overcome the effects of temperature variation, reliability degradation, and process variation.
References
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Book
Digital integrated circuits: a design perspective
TL;DR: In this paper, the authors present a survey of the state-of-the-art in the field of digital integrated circuits, focusing on the following: 1. A Historical Perspective. 2. A CIRCUIT PERSPECTIVE.
Book
CMOS VLSI Design : A Circuits and Systems Perspective
Neil Weste,David Money Harris +1 more
TL;DR: The authors draw upon extensive industry and classroom experience to introduce todays most advanced and effective chip design practices, and present extensively updated coverage of every key element of VLSI design, and illuminate the latest design challenges with 65 nm process examples.
Journal ArticleDOI
Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas
Takayasu Sakurai,A.R. Newton +1 more
TL;DR: In this paper, an alpha-power-law MOS model that includes the carrier velocity saturation effect, which becomes prominent in short-channel MOSFETs, is introduced and closed-form expressions for the delay, short-circuit power, and transition voltage of CMOS inverters are derived.