Proceedings ArticleDOI
Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup
Weirong Jiang,Qingbo Wang,Viktor K. Prasanna +2 more
- pp 1786-1794
Reads0
Chats0
TLDR
A parallel SRAM-based multi- pipeline architecture for terabit IP lookup, with a two-level mapping scheme, that can store a core routing table with over 200 K unique routing prefixes using 3.5 MB of memory.Abstract:
Continuous growth in network link rates poses a strong demand on high speed IP lookup engines. While Ternary Content Addressable Memory (TCAM) based solutions serve most of today's high-end routers, they do not scale well for the next-generation. On the other hand, pipelined SRAM- based algorithmic solutions become attractive. Intuitively multiple pipelines can be utilized in parallel to have a multiplicative effect on the throughput. However, several challenges must be addressed for such solutions to realize high throughput. First, the memory distribution across different stages of each pipeline as well as across different pipelines must be balanced. Second, the traffic on various pipelines should be balanced. In this paper, we propose a parallel SRAM-based multi- pipeline architecture for terabit IP lookup. To balance the memory requirement over the stages, a two-level mapping scheme is presented. By trie partitioning and subtrie-to-pipeline mapping, we ensure that each pipeline contains approximately equal number of trie nodes. Then, within each pipeline, a fine-grained node-to-stage mapping is used to achieve evenly distributed memory across the stages. To balance the traffic on different pipelines, both pipelined prefix caching and dynamic subtrie-to-pipeline remapping are employed. Simulation using real-life data shows that the proposed architecture with 8 pipelines can store a core routing table with over 200 K unique routing prefixes using 3.5 MB of memory. It achieves a throughput of up to 3.2 billion packets per second, i.e. 1 Tbps for minimum size (40 bytes) packets.read more
Citations
More filters
Proceedings ArticleDOI
IPv6 Lookups using Distributed and Load Balanced Bloom Filters for 100Gbps Core Router Line Cards
TL;DR: The Distributed and Load Balanced Bloom Filters to address these drawbacks of Bloom filter-based IP lookup algorithms and develop the practical IP lookup algorithm for use in 100Gbps line cards.
Proceedings ArticleDOI
Poptrie: A Compressed Trie with Population Count for Fast and Scalable Software IP Routing Table Lookup
Hirochika Asai,Yasuhiro Ohara +1 more
TL;DR: Poptrie, a fast and scalable software routing lookup algorithm based on a multiway trie, which leverages the population count instruction on bit-vector indices for the descendant nodes to compress the data structure within the CPU cache, is presented.
Patent
Systolic array architecture for fast ip lookup
TL;DR: In this article, an SRAM-based pipeline IP lookup architecture is presented, where a multitude of intersecting and different length pipelines are constructed on a two dimensional array of processing elements in a circular fashion.
Proceedings ArticleDOI
PLUG: flexible lookup modules for rapid deployment of new protocols in high-speed routers
TL;DR: A flexible lookup module, PLUG (Pipelined Lookup Grid), which can achieve generality without loosing efficiency because various custom lookup modules have the same fundamental features the authors retain: area dominated by memories, simple processing, and strict access patterns defined by the data structure.
Proceedings ArticleDOI
GAMT: a fast and scalable IP lookup engine for GPU-based software routers
TL;DR: This paper investigates GPU's characteristics in parallelism and memory accessing, and then encode a multibit trie into a state-jump table and shows clearly that GAMT makes significant progress on both scalability and performance.
References
More filters
Book
Algorithm Design
Jon Kleinberg,Éva Tardos +1 more
TL;DR: Algorithm Design introduces algorithms by looking at the real-world problems that motivate them and encourages an understanding of the algorithm design process and an appreciation of the role of algorithms in the broader field of computer science.
Proceedings ArticleDOI
Small forwarding tables for fast routing lookups
TL;DR: A forwarding table data structure designed for quick routing lookups, small enough to fit in the cache of a conventional general purpose processor and feasible to do a full routing lookup for each IP packet at gigabit speeds without special hardware.
Proceedings ArticleDOI
Routing lookups in hardware at memory access speeds
Pankaj Gupta,S. Lin,Nick McKeown +2 more
TL;DR: This work presents a route lookup mechanism that when implemented in a pipelined fashion in hardware, can achieve one route lookup every memory access; much faster than current commercially available routing lookup schemes.
Journal ArticleDOI
Survey and taxonomy of IP address lookup algorithms
TL;DR: A survey of state-of-the-art IP address lookup algorithms is presented and their performance in terms of lookup speed, scalability, and update overhead is compared.
Journal ArticleDOI
Fast address lookups using controlled prefix expansion
V. Srinivasan,George Varghese +1 more
TL;DR: The main technique, controlled prefix expansion, transforms a set of prefixes into an equivalent set with fewer prefix lengths, and optimization techniques based on dynamic programming, and local transformations of data structures to improve cache behavior are used.