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Proceedings ArticleDOI

Blockchain technology enabled pay per use licensing approach for hardware IPs

09 Mar 2020-pp 1618-1621
TL;DR: This work seeks refuge to blockchain technology to eradicate third parties and facilitate a transparent and automated pay per use licensing mechanism and dynamic pricing of the hardware IPs based on the factors of trustworthiness and aging.
Abstract: The present era is witnessing a reuse of hardware IPs to reduce cost As trustworthiness is an essential factor, designers prefer to use hardware IPs which performed effectively in the past, but at the same time, are still active and did not age In such scenarios, pay per use licensing schemes suit best for both producers and users Existing pay per use licensing mechanisms consider a centralized third party, which may not be trustworthy Hence, we seek refuge to blockchain technology to eradicate such third parties and facilitate a transparent and automated pay per use licensing mechanism A blockchain is a distributed public ledger whose records are added based on peer review and majority consensus of its participants, that cannot be tampered or modified later Smart contracts are deployed to facilitate the mechanism Even dynamic pricing of the hardware IPs based on the factors of trustworthiness and aging have been focused in this work, which are not associated in existing literature Security analysis of the proposed mechanism has been provided Performance evaluation is carried based on the gas usage of Ethereum Solidity test environment, along with cost analysis based on lifetime and related user ratings
Citations
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Journal ArticleDOI
TL;DR: In this paper , the authors present a systematic literature review of patent management using blockchain technology and show that blockchain technology mitigates environmental and behavioral uncertainty, while stimulating new governance forms and business models by reorganizing or discarding stakeholders.

15 citations

References
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Journal ArticleDOI
TL;DR: A comprehensive description of the first known active hardware metering method is provided and new formal security proofs are introduced and an automatic synthesis method for low overhead hardware implementation is devised.
Abstract: In the horizontal semiconductor business model where the designer's intellectual property (IP) is transparent to foundry and to other entities on the production chain, integrated circuits (ICs) overbuilding and IP piracy are prevalent problems. Active metering is a suite of methods enabling the designers to control their chips postfabrication. We provide a comprehensive description of the first known active hardware metering method and introduce new formal security proofs. The active metering method uniquely and automatically locks each IC upon manufacturing, such that the IP rights owner is the only entity that can provide the specific key to unlock or otherwise control each chip. The IC control mechanism exploits: 1) the functional description of the design, and 2) unique and unclonable IC identifiers. The locks are embedded by modifying the structure of the hardware computation model, in the form of a finite state machine (FSM). We show that for each IC hiding the locking states within the modified FSM structure can be constructed as an instance of a general output multipoint function that can be provably efficiently obfuscated. The hidden locks within the FSM may also be used for remote enabling and disabling of chips by the IP rights owner during the IC's normal operation. An automatic synthesis method for low overhead hardware implementation is devised. Attacks and countermeasures are addressed. Experimental evaluations demonstrate the low overhead of the method. Proof-of-concept implementation on the H.264 MPEG decoder automatically synthesized on a Xilinix Virtex-5 field-programmable gate array (FPGA) further shows the practicality, security, and the low overhead of the new method.

172 citations


"Blockchain technology enabled pay p..." refers background in this paper

  • ...Hardware Metering/ Pay Per Use Licensing Mechanisms Gaining post fabrication control of hardware IPs via hardware metering was proposed in [10], [11]....

    [...]

Proceedings ArticleDOI
22 Jun 2001
TL;DR: This work introduces the first hardware metering scheme that enables reliable low overhead proofs for the number of manufactured parts and establishes the connection between the requirements for hardware and synthesis process.
Abstract: We introduce the first hardware metering scheme that enables reli-able low overhead proofs for the number of manufactured parts. The key idea is to make each design slightly different. Therefore, if two identical hardware designs or a design that is not reported by the foundry are detected, the design house has proof of miscon-duct. We start by establishing the connection between the require-ments for hardware and synthesis process. Furthermore, we present mathematical analysis of statistical accuracy of the pro-posed hardware metering scheme. The effectiveness of the meter-ing scheme is demonstrated on a number of designs.

138 citations


"Blockchain technology enabled pay p..." refers background in this paper

  • ...Hardware Metering/ Pay Per Use Licensing Mechanisms Gaining post fabrication control of hardware IPs via hardware metering was proposed in [10], [11]....

    [...]

Journal ArticleDOI
TL;DR: A novel IP protection mechanism to restrict IP's execution only on specific FPGA devices in order to efficiently protect IPs from being cloned, copied, or used with unauthorized integration is proposed and can also enforce the pay-per-device licensing.
Abstract: With its reprogrammability, low design cost, and increasing capacity, field-programmable gate array (FPGA) has become a popular design platform and a target for intellectual property (IP) infringement. Currently available IP protection solutions are usually limited to protect single FPGA configurations and require permanent secret key storage in the FPGA. In addition, they cannot provide a commercially popular pay-per-device licensing solution. In this paper, we propose a novel IP protection mechanism to restrict IP’s execution only on specific FPGA devices in order to efficiently protect IPs from being cloned, copied, or used with unauthorized integration. This mechanism can also enforce the pay-per-device licensing, which enables the system developers to purchase IPs from the core vendors at the low price based on usage instead of paying the expensive unlimited IP license fees. In our proposed binding-based mechanism, FPGA vendors embed into each enrolled FPGA device with a physical unclonable function (PUF) customized for FPGAs; IP vendors embed augmented finite-state machines (FSM) into the original IPs such that the FSM can be activated by the PUF responses from the FPGA device. We propose protocols to lock and unlock FPGA IPs, demonstrate how PUF can be embedded onto FPGA devices, and analyze the security vulnerabilities of our PUF-FSM binding method. We implement a 128-bit delay-based PUF on 28-nm FPGAs with only 258 RAM-lookup tables and 256 flipflops. The PUF responses are unique and reliable against environment changes. We also synthesize a variety of FSM benchmark circuits. On large benchmarks, the average timing overhead is 0.64% and power overhead in 0.01%.

131 citations


"Blockchain technology enabled pay p..." refers background in this paper

  • ...licensing and protection of IPs was proposed in [8]....

    [...]

  • ...Existing pay per use licensing or hardware metering techniques [7], [8] are associated with a centralized third party, which is assumed to be trusted and do not adhere to a blockchain based technology....

    [...]

Journal ArticleDOI
TL;DR: This work proposes an IP protection mechanism for FPGA designs at the level of individual IP cores, by making use of the self-reconfiguring capabilities of modern FPGAs and deploying a trusted third party to run a metering service, similar to the work of Giineysu et ah and Drimer et at
Abstract: Currently achievable intellectual property (IP) protection solutions for field-programmable gate arrays (FPGAs) are limited to single large "monolithic" configurations. However, the ever growing capabilities of FPGAs and the consequential increasing complexity of their designs ask for a modular development model, where individual IP cores from multiple parties are integrated into a larger system. To enable such a model, the availability of IP protection at the modular level is imperative. In this work, we propose an IP protection mechanism for FPGA designs at the level of individual IP cores, by making use of the self-reconfiguring capabilities of modern FPGAs and deploying a trusted third party to run a metering service, similar to the work of Giineysu et ah and Drimer et at The proposed scheme makes it possible to enforce a pay-per-use licensing scheme which holds considerable advantages, both for IP core providers as well as for system integrators. Moreover, the scheme has a minimal implementation overhead and is the first of its kind to be solely based on primitives that are already available in recent commercially available FPGA devices. This allows for an immediate and feasible deployment, in contrast to earlier proposed solutions.

69 citations


"Blockchain technology enabled pay p..." refers background in this paper

  • ...Existing pay per use licensing or hardware metering techniques [7], [8] are associated with a centralized third party, which is assumed to be trusted and do not adhere to a blockchain based technology....

    [...]

Journal ArticleDOI
TL;DR: This paper identifies design constraints for Trojan detection to achieving detection, collusion prevention, and isolating the Trojan-infected 3PIP, and incorporates them during high-level synthesis.
Abstract: Trustworthiness of system-on-chip designs is undermined by malicious logic (Trojans) in third-party intellectual properties (3PIPs). In this paper, duplication, diversity, and isolation principles have been extended to detect build trustworthy systems using untrusted, potentially Trojan-infected 3PIPs. We use a diverse set of vendors to prevent collusions between the 3PIPs from the same vendor. We identify design constraints for Trojan detection to achieving detection, collusion prevention, and isolating the Trojan-infected 3PIP, and incorporate them during high-level synthesis. In addition, we develop techniques to reduce the number of vendors. The effectiveness of the proposed techniques is validated using the high-level synthesis benchmarks.

64 citations


"Blockchain technology enabled pay p..." refers background in this paper

  • ...Hardware IPs are procured from different sources and integrated to form a complete system [2]....

    [...]