Journal ArticleDOI
Chip design of portable speech memopad suitable for persons with visual disabilities
Reads0
Chats0
TLDR
The proposed speech recognition and compression chip for portable memopad devices, especially suitable for use by the visually impaired, is presented, based on several cores of which they can be regarded as intellectual property cores to be used for a variety of speech-related application systems.Abstract:
This paper presents the design of a speech recognition and compression chip for portable memopad devices, especially suitable for use by the visually impaired. The proposed chip design is based on several cores of which they can be regarded as intellectual property (IP) cores to be used for a variety of speech-related application systems. A cepstrum extraction core and a dynamic warping core are designed for mapping the speech recognition algorithms. In the cepstrum extraction core, a novel architecture computes the autocorrelation between the overlapping frames using two pairs of shift registers and an intelligent accumulation procedure. The architecture of the dynamic time warping core uses only a single processing element, and is based on our extensive study of the relationship among the nodes in the dynamic time warping lattice. Bit rate is the key factor affecting the memory size for speech compression; therefore, a very low bit-rate speech coder is used. The speech coder exploits a line-spectrum-based interpolation method, which yields fine quality synthesized speech despite the low 1.6 kbps bit rate. The 1.6 kbps vocoder core is cost-effective, and it integrates both encoder and decoder algorithms. The proposed design has been tested via hardware simulations on Xilinx Virtex series FPGAs and a semi-custom chip fabricated by 0.35 /spl mu/m CMOS single-poly-four-metal technology on a die size approximately 4.46/spl times/4.46 mm/sup 2/.read more
Citations
More filters
Journal ArticleDOI
Robust Environmental Sound Recognition for Home Automation
TL;DR: This work presents a robust environmental sound recognition system for home automation that uses signal-to-noise ratio-aware subspace-based signal enhancement and sound recognition with independent component analysis mel-frequency cepstral coefficients and a frame-based multiclass support vector machines, respectively.
Journal ArticleDOI
VLSI Design for SVM-Based Speaker Verification System
TL;DR: The proposed chip comprises a speaker feature extraction (SFE) module, an SVM module, and a decision module that performs autocorrelation analysis, linear predictive coefficient (LPC) extraction, and LPC-to-cepstrum conversion.
Proceedings ArticleDOI
A Low Power Wake-Up Circuitry Based on Dynamic Time Warping for Body Sensor Networks
Roozbeh Jafari,Reza Lotfian +1 more
TL;DR: The results show that the power consumption for inertial based monitoring systems can be reduced by at least three orders of magnitude using the proposed architecture compared to the state-of-the-art low power microcontrollers.
Proceedings ArticleDOI
Chip Design of LPC-cepstrum for Speech Recognition
Gin-Der Wu,Zhen-Wei Zhu +1 more
TL;DR: The proposed ASIC of LPCC can reduce the calculation load of processor in the speech recognition system and the resource sharing method is adopted into the design in order to reduce the chip size.
Proceedings ArticleDOI
An architecture of HMM-based isolated-word speech recognition with tone detection function
TL;DR: This paper proposes an architecture of HMM-based isolated-word speech recognition with tone detection function that is added into each computation process of series architecture and each parallel computation of scalable architecture.
References
More filters
Book
Fundamentals of speech recognition
TL;DR: This book presents a meta-modelling framework for speech recognition that automates the very labor-intensive and therefore time-heavy and therefore expensive and expensive process of manually modeling speech.
Journal ArticleDOI
Linear prediction: A tutorial review
TL;DR: This paper gives an exposition of linear prediction in the analysis of discrete signals as a linear combination of its past values and present and past values of a hypothetical input to a system whose output is the given signal.
Book
Discrete-Time Processing of Speech Signals
TL;DR: The preface to the IEEE Edition explains the background to speech production, coding, and quality assessment and introduces the Hidden Markov Model, the Artificial Neural Network, and Speech Enhancement.
Book
Vlsi Digital Signal Processing Systems: Design And Implementation
TL;DR: This book discusses Digital Signal Processing Systems, Pipelining and Parallel Processing, Synchronous, Wave, and Asynchronous Pipelines, and Bit-Level Arithmetic Architectures.
Cepstrum analysis technique for automatic speaker verification
TL;DR: New techniques for automatic speaker verification using telephone speech based on a set of functions of time obtained from acoustic analysis of a fixed, sentence-long utterance using a new time warping method using a dynamic programming technique.
Related Papers (5)
Application of a VLSI Vector Quantization Processor to Real-Time Speech Coding
G. Davidson,Allen Gersho +1 more