Proceedings ArticleDOI
Compiler-based side channel vulnerability analysis and optimized countermeasures application
Giovanni Agosta,Alessandro Barenghi,Massimo Maggi,Gerardo Pelosi +3 more
- pp 81
TLDR
A new security-oriented data-flow analysis assessing the vulnerability level of a cipher with bit-level accuracy is introduced, implementing a general and extensible compiler-based tool to assess the instruction resistance against power-based side-channels.Abstract:
Modern embedded systems manage sensitive data increasingly often through cryptographic primitives. In this context, side-channel attacks, such as power analysis, represent a concrete threat, regardless of the mathematical strength of a cipher. Evaluating the resistance against power analysis of cryptographic implementations and preventing it, are tasks usually ascribed to the expertise of the system designer. This paper introduces a new security-oriented data-flow analysis assessing the vulnerability level of a cipher with bit-level accuracy. A general and extensible compiler-based tool was implemented to assess the instruction resistance against power-based side-channels. The tool automatically instantiates the essential masking countermeasures, yielding a ×2.5 performance speedup w.r.t. protecting the entire code.read more
Citations
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Journal ArticleDOI
A fault induction technique based on voltage underfeeding with application to attacks against AES and RSA
TL;DR: A low-cost, non-invasive and effective technique to inject transient faults into a general purpose processor through lowering its feeding voltage, and to characterize the effects on the computing system is presented.
Book ChapterDOI
Detecting Flawed Masking Schemes with Leakage Detection Tests
TL;DR: In this article, the authors present a method to verify the soundness of a masking scheme before implementing it on a device using high-level source code instrumentation and leakage detection techniques.
Journal ArticleDOI
The MEET Approach: Securing Cryptographic Embedded Software Against Side Channel Attacks
TL;DR: An automated approach to protect spill actions onto the main memory, which are inserted by the compiler backend register allocator when there is a lack of available registers, thus, removing the need for manual assembly inspection.
Journal ArticleDOI
Compiler-Assisted Loop Hardening Against Fault Attacks
TL;DR: This article proposes a generic compile-time loop hardening scheme based on the duplication of termination conditions and of the computations involved in the evaluation of such conditions, and implemented this algorithm in LLVM 4.0 at the Intermediate Representation (IR) level in the backend.
Proceedings ArticleDOI
A Multiple Equivalent Execution Trace Approach to Secure Cryptographic Embedded Software
TL;DR: It is proposed an efficient and effective method to secure software implementations of cryptographic primitives on low-end embedded systems, against passive side-channel attacks relying on the observation of power consumption or electro-magnetic emissions.
References
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Book ChapterDOI
Differential Power Analysis
TL;DR: In this paper, the authors examine specific methods for analyzing power consumption measurements to find secret keys from tamper resistant devices. And they also discuss approaches for building cryptosystems that can operate securely in existing hardware that leaks information.
Book
Advanced Compiler Design and Implementation
TL;DR: Advanced Compiler Design and Implementation by Steven Muchnick Preface to Advanced Topics
Book
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
TL;DR: In this paper, the authors present a comprehensive treatment of power analysis attacks and countermeasures, based on the principle that the only way to defend against such attacks is to understand them.
Book ChapterDOI
Towards Sound Approaches to Counteract Power-Analysis Attacks
TL;DR: An abstract model which approximates power consumption in most devices and in particular small single-chip devices is proposed, and a lower bound on the number of experiments required to mount statistical attacks on devices whose physical characteristics satisfy reasonable properties is proved.
Book ChapterDOI
Private Circuits: Securing Hardware against Probing Attacks
TL;DR: This paper proposes several efficient techniques for building private circuits resisting side channel attacks, and provides a formal threat model and proofs of security for their constructions.