Book ChapterDOI
Compiler generation techniques for embedded processors and their application to HW/SW codesign
Masaharu Imai,Yoshinori Takeuchi,Norimasa Ohtsuki,Nobuyuki Hikichi +3 more
- pp 293-320
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TLDR
Systems-on-a-chip will be suitable for embedded applications, such as consumer electronics products that perform sophisticated data and information processing, telecommunication equipment that perform movie picture and audio transmission, control systems for industrial manufacturing, automobile, and avionics.Abstract:
Due to the advancing semiconductor technology it is becoming possible within ten years to fabricate a highly complex and high performance VLSI that includes more than hundred million transistors on a single silicon chip [1]. Using such a technology, so-called systems-on-a-chip, that includes CPU cores, DSPs, memory blocks (RAM and ROM), application specific hardware modules, FPGA blocks, as well as analog and radio frequency blocks, as shown Figure 1. Systems-on-a-chip will be suitable for embedded applications, such as consumer electronics products that perform sophisticated data and information processing, telecommunication equipment that perform movie picture and audio transmission, control systems for industrial manufacturing, automobile, and avionics.read more
Citations
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Journal ArticleDOI
Advantage and Possibility of Application-domain Specific Instruction-set Processor (ASIP)
TL;DR: The concept and technology of Application-domain Specific Instruction-set Processor (ASIP) is introduced and the possibility of ASIP as an important component of Multi Processor SoC (MPSoC) is discussed.
Proceedings ArticleDOI
Symbolic simulation heuristics for high-level design descriptions with uninterpreted functions
TL;DR: This paper handles symbolic simulation for high-level design descriptions including uninterpreted functions, and succeeds in checking the equivalence of the two descriptions which were not tractable without the heuristics, up to thousands of cycles.
Book ChapterDOI
Symbolic Checking of Signal-Transition Consistency for Verifying High-Level Designs
TL;DR: A new notion of consistency based on signal-transitions of the corresponding outputs of the respective outputs of register-transfer-level descriptions and behavioral descriptions is defined, and an algorithm for checking consistency of those descriptions is proposed, up to a limited number of steps from initial states.
Proceedings ArticleDOI
Generation of application-domain Specific Instruction-set Processors
TL;DR: This paper introduces a generation method of Application-domain Specific Instruction-set Processors (ASIP) and shows an design example, which shows some effectiveness of ASIP.
Journal Article
An ASIP Instruction Set Optimization Algorithm with Functional Module Sharing Constraint (Special Section on VLSI Design and CAD Algorithms)
TL;DR: In this paper, a formal method that selects the instruction set of an ASIP (application specific integrated processor) that maximizes the chip performance under the constraints of chip area and power consumption is presented.
References
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Book
Computer Architecture: A Quantitative Approach
TL;DR: This best-selling title, considered for over a decade to be essential reading for every serious student and practitioner of computer design, has been updated throughout to address the most important trends facing computer designers today.
Journal ArticleDOI
Trace Scheduling: A Technique for Global Microcode Compaction
TL;DR: Compilation of high-level microcode languages into efficient horizontal microcode and good hand coding probably both require effective global compaction techniques.
Journal ArticleDOI
A methodology for the real world
Gregory J. Chaitin,Marc Alan Auslander,Ashok K. Chandra,John Cocke,Martin Edward Hopkins,Peter Willy Markstein +5 more
TL;DR: Preliminary results of an experimental implementation in a PL/I optimizing compiler suggest that global register allocation approaching that of hand-coded assembly language may be attainable.
Book
Hardware-software co-design of embedded systems: the POLIS approach
Felice Balarin,Massimiliano Chiodo,Paolo Giusto,Harry Hsieh,Attila Jurecska,Luciano Lavagno,Claudio Passerone,Alberto Sangiovanni-Vincentelli,Ellen M. Sentovich,Kei Suzuki,Bassam Tabbara +10 more
TL;DR: This paper is intended to give a complete overview of the POLIS system including its formal and algorithmic aspects and will be of interest to embedded system designers (automotive electronics, consumer electronics and telecommunications), micro-controller designers, CAD developers and students.