Proceedings ArticleDOI
Demonstration of a novel multiple-valued T-gate using multiple-junction surface tunnel transistors and its application to three-valued data flip-flop
T. Uemura,T. Baba +1 more
- pp 305-310
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TLDR
A novel T-gate consisting of multi-junction surface tunnel transistors (MJ-STTs) and hetero- junction FETs (HJFETs) was proposed and its operation was successfully confirmed by both simulation and experiment.Abstract:
A novel T-gate consisting of multi-junction surface tunnel transistors (MJ-STTs) and hetero-junction FETs (HJFETs) were proposed and its operation was successfully confirmed by both simulation and experiment. The number of the devices required for their-gate can be drastically reduced due to a high functionality of the MJ-STT. Only three MJ-STTs and three HJFETs were required to fabricate the three-valued T-gate, whose number is less than one half of that of the conventional circuit. The fabricated circuit exhibited a basic T-gate operation with various logic function. Furthermore, a multiple-valued data flip-flop (D-FF) circuit could be realized by only one T-gate.read more
Citations
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Journal ArticleDOI
Logic synthesis and circuit modeling of a programmable logic gate based on controlled quenching of series-connected negative differential resistance devices
Kevin J. Chen,Guofu Niu +1 more
TL;DR: This work proposes and experimentally demonstrate a new circuit that takes full advantage of the NDR feature in RT devices and indicates that it can be applied to the implementation of programmable logic circuits, which will provide cost-effective prototypes for modern circuit designs.
Journal ArticleDOI
A three-valued D-flip-flop and shift register using multiple-junction surface tunnel transistors
T. Uemura,T. Baba +1 more
TL;DR: In this paper, a three-valued D-flip-flop (D-FF) circuit and a two-stage shift register built from InGaAs-based multiple-junction surface tunnel transistors (MJSTT) and Si-based metal-oxide-semiconductor field effect transistors(MOSFET) have been demonstrated.
Proceedings ArticleDOI
A three-valued D-flip-flop and shift register using multiple-junction surface tunnel transistors
T. Uemura,T. Baba +1 more
TL;DR: A three-valued D-flip-flop (D-FF) circuit and a two-stage shift register built from InGaAs-based multiple-junction surface tunnel transistors and Si-based metal-oxide-semiconductor field effect transistors (MOSFET) have been demonstrated.
Journal ArticleDOI
Development of Programmable Logic Array for Multiple-Valued Logic Functions
Vitaly Levashenko,Igor A. Luk'yanchuk,Elena Zaitseva,Miroslav Kvassay,Jan Rabcan,Patrik Rusnak +5 more
TL;DR: This article proposes to use the ferroelectrics for the implementation of MVL units using their ability to pin the polarization as a sequence of multistable states using generalized Reed-Muller expression for the representation of an MVL function.
Journal ArticleDOI
Design of ternary D flip-flop with pre-set and pre-reset functions based on resonant tunneling diode literal circuit
TL;DR: Ternary flip-flop consists of an RTD literal circuit that not only is easy to understand and implement but also provides a solution for the algebraic interface between the multiple-valued logic and the binary logic.
References
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Journal ArticleDOI
Resonant tunneling device with multiple negative differential resistance: Digital and signal processing applications with reduced circuit complexity
TL;DR: In this article, a new approach to obtain multiple peaks in the current-voltage characteristic of a resonant-tunneling (RT) device is demonstrated, where the peaks are generated using only the ground state resonance of the quantum well rather than several states.
Journal ArticleDOI
A New Resonant Tunneling Logic Gate Employing Monostable-Bistable Transition
Koichi Maezawa,Takashi Mizutani +1 more
TL;DR: In this paper, a new resonant tunneling logic gate has been proposed to employ the monostable-to-bistable transition of a circuit consisting of two N-type negative differential resistance (NDR) devices connected serially.
Journal ArticleDOI
Proposal for Surface Tunnel Transistors
TL;DR: The surface tunnel transistor (STT) as mentioned in this paper is a three-terminal tunnel device with an insulated gate in the i-region, which is similar to a MOSFET.
Journal ArticleDOI
Resonant-tunneling diode and HEMT logic circuits with multiple thresholds and multilevel output
TL;DR: The validity of the basic idea behind the circuits presented here is proven, and the device counts and the number of logic stages required for the present circuits are less than half those for conventional ones.
Journal ArticleDOI
Large enhancement of interband tunneling current densities of over 10/sup 5/ A/cm/sup 2/ in In/sub 0.53/Ga/sub 0.47/As-based surface tunnel transistors
T. Uemura,T. Baba +1 more
TL;DR: In this article, a GaAs-based Surface Tunnel Transistor (STT) was investigated with the goal of increasing the tunneling current density for high-speed operation and the fabricated devices enhanced an interband tunneling currents by a factor of 10/sup 2/ compared to the conventional GaAs/Ga/sub 0.47/As-STT's due to a smaller bandgap energy and a lighter electron effective mass.