Digital background gain error correction in pipeline ADCs
Antonio Gines,Eduardo Peralias,Adoración Rueda +2 more
- Vol. 1, pp 10082
TLDR
A new digital technique for background calibration of gain errors in pipeline ADCs is presented, based on the use of a stage with two input-output characteristics, depending on the value of a digital noise signal.Abstract:
This paper presents a new digital technique for background calibration of gain errors in pipeline ADCs. The proposed algorithm estimates and corrects both the MDAC gain error of the stage under calibration and the global gain error associated to the uncalibrated stages without interruption of the conversion and without reduction of the dynamic rate. It is based on the use of a stage with two input-output characteristics, depending on the value of a digital noise signal.read more
Citations
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A 10bit 120MSample/s Time-Interleaved Analog-to-Digital Converter with Digital Background Calibration
TL;DR: In this paper, adaptive signal processing is used to correct offset mismatch, gain mismatch, and sample-time error between time-interleaved channels in a 10b 120MSample/s pipelined ADC.
Journal ArticleDOI
Noisy signal based background technique for gain error correction in pipeline ADCs
TL;DR: Simulation results have proved the stability of the algorithm and the tracking capability for fast gain error changes considering second order effects in both the sub-ADC of the SUC and the back-end stages, making this technique a very promising alternative for background calibration of the nonlinearity associated with the gain errors.
Dissertation
Conception de Convertisseurs Analogique-Numérique en technologie CMOS basse tension pour chaînes Vidéo CCD Spatiales
TL;DR: In this paper, the authors propose an approach to constructions in tension and en tension, respectively, with the purpose of constraining the erreurs de gain, d'offsets, and des niveaux de reference utilises.
Digital gain error correction technique for 8-bit pipeline adc
TL;DR: An analog-to-digital converter (ADC) is a link between the analog and digital domains and plays a vital role in modern mixed signal processing systems.
References
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Journal ArticleDOI
A 10b 120MSample/s time-interleaved analog-to-digital converter with digital background calibration
TL;DR: Digital calibration using adaptive signal processing corrects offset mismatch, gain mismatch, and sample-time error between time-interleaved channels in a 10b 120MSample/s pipelined ADC.
Journal ArticleDOI
A digital background calibration technique for time-interleaved analog-to-digital converters
TL;DR: A 10-bit 40-Msample/s two-channel parallel pipelined ADC with monolithic digital background calibration with Adaptive signal processing and extra resolution in each channel is designed and fabricated in a 1 /spl mu/m CMOS technology.
Journal ArticleDOI
Background digital calibration techniques for pipelined ADCs
Un-Ku Moon,Bang-Sup Song +1 more
TL;DR: A skip and fill algorithm is developed to digitally self-calibrate pipelined analog-to-digital converters (ADC's) in real time, based on the concept of skipping conversion cycles randomly but filling in data later by nonlinear interpolation.
Journal ArticleDOI
A 15 b 5 MSample/s low-spurious CMOS ADC
TL;DR: System partitioning and multi-stage calibration solve two fundamental problems of capacitor matching and finite opamp gain.
Journal ArticleDOI
A continuously calibrated 12-b, 10-MS/s, 3.3-V A/D converter
J.M. Ingino,Bruce A. Wooley +1 more
TL;DR: A continuous calibration technique for pipelined and successive approximation ADCs that avoids some of the limitations of earlier designs by performing the calibration in the analog domain.
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