Proceedings ArticleDOI
Hardware realization of a multistage speech waveform vector quantizater
Liu Tian-ming,Hu Zheng +1 more
- Vol. 11, pp 3095-3097
Reads0
Chats0
TLDR
It turns out that the hardware coder can match the computer simulation very well, the SNR value of which achieves about 15 dB at 2 bits/sample and 12 dB at 1 bit/sample.Abstract:
In this paper, we report on a working multistage speech waveform VQ system based on mostly LSTTL devices without any special purpose processors. The main features of the system are as follows. First, we use companding AD/DA converters to overcome the inadequate linear 8-bit word length while maintaining the whole system efficient. Secondly, full pipeline structure and table lookup for the squaring operations make the full search speed of our system depend only on the speed of memories. Lastly, multi-stage scheme is used to achieve higher vector dimension and codebook size. It turns out that the hardware coder can match the computer simulation very well, the SNR value of which achieves about 15 dB at 2 bits/sample and 12 dB at 1 bit/sample.read more
Citations
More filters
Journal ArticleDOI
Bit-serial VLSI implementation of vector quantizer for real-time image coding
P.A. Ramamoorthy,B. Potu,T. Tran +2 more
TL;DR: A practical high-throughput architecture and its implementation for real-time coding of television-quality signals are presented and the architecture is directed toward the implementation of multistage vector quantization (VQ), as the authors' simulation results show that the latter is more suitable for real -time coding.
Journal ArticleDOI
An integrated circuit design for pruned tree-search vector quantization encoding with an off-chip controller
TL;DR: The design of an encoder for pruned tree-search vector quantization (VQ) is discussed, which allows near-optimal performance in a mean square error sense while keeping the hardware complexity low.
Journal ArticleDOI
VLSI architectures for vector quantization
M. Yan,John V. McCanny,Yu Hen Hu +2 more
TL;DR: A new family of bit level systolic VLSI architectures which offer an attractive solution to the real time implementation of an efficient signal compression technique, Vector Quantization, based on a bit serial, word parallel approach.
References
More filters
Journal ArticleDOI
An Algorithm for Vector Quantizer Design
Y. Linde,A. Buzo,Robert M. Gray +2 more
TL;DR: An efficient and intuitive algorithm is presented for the design of vector quantizers based either on a known probabilistic model or on a long training sequence of data.
Journal Article
Vector quantization
TL;DR: During the past few years several design algorithms have been developed for a variety of vector quantizers and the performance of these codes has been studied for speech waveforms, speech linear predictive parameter vectors, images, and several simulated random processes.
Proceedings ArticleDOI
Multiple stage vector quantization for speech coding
Biing-Hwang Juang,A. Gray +1 more
TL;DR: Experimental results show that the quantizer performance is very close to a theoretically predicted asymptotically optimal rate distortion relationship for Euclidean distance measures.
Journal ArticleDOI
Hardware Realization of Waveform Vector Quantizers
B. Tao,H. Abut,Robert M. Gray +2 more
TL;DR: The subjective and quantitative results are compared to both simulations and with a real-time array processor based implementation.
Proceedings ArticleDOI
Real-time speech compression with a VLSI vector quantization processor
TL;DR: This paper presents a special purpose processing architecture which supports real-time search of large codebooks, and describes a pipeline architecture which reduces the effective computation time for a single vector component to one period.