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Proceedings ArticleDOI

Hierarchical specification-driven analog fault modeling for efficient fault simulation and diagnosis

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TLDR
The MiST PROFIT (Mixed Signal Test Program for Fault Insertion and Testing) software for hierarchical fault modeling, tolerance modeling, fault clustering and fault diagnosis of complex mixed-signal systems is discussed.
Abstract
In this paper we discuss the capabilities of the MiST PROFIT (Mixed Signal Test Program for Fault Insertion and Testing) software for hierarchical fault modeling, tolerance modeling, fault clustering and fault diagnosis of complex mixed-signal systems. The software is designed to exploit the relationships between high level system specifications and module-level faults in complex and nonlinear mixed signal systems. Hierarchical simulation based methods are used to capture fault effects at different levels of circuit abstraction. The key features of our approach are: (a) the ability to compute tolerance effects from nonlinear behavioral models at different levels of circuit design hierarchy accurately using low-cost simulation based methods, (b) the ability to perform compaction of fault effects while transferring fault effects from the leaf cells to the highest level behavioral models, (c) the ability to capture parametric (soft) failure effects over the entire anticipated range of faulty parameter values and (d) the ability to construct fault dictionaries given a set of least replaceable units to diagnose.

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Citations
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Proceedings ArticleDOI

Test metrics for analog parametric faults

TL;DR: The concept of partial coverage is introduced, it is shown that it is inherent to analog testing, and coverage cannot be calculated without knowing the performance specifications for a circuit, as well as the process parameter distributions.
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Physical planning with retiming

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Proceedings ArticleDOI

Parametric fault diagnosis for analog systems using functional mapping

TL;DR: A new Simulation-After-Test (SAT) methodology for accurate diagnosis of circuit parameters in large analog circuits based on constructing a non-linear regression model using prior circuit simulation, which relates a set of measurements to the circuit's internal parameters.
Journal ArticleDOI

Hierarchical ATPG for analog circuits and systems

TL;DR: This article presents an algorithm based on controllability and observability computation for hierarchical analog ATPG that has been implemented in a prototype tool, and results based on several case studies show the application of the technique.
Proceedings ArticleDOI

Test generation for comprehensive testing of linear analog circuits using transient response sampling

TL;DR: This paper presents a test generation algorithm for implicit functional testing of linear analog circuits using transient response sampling with simplicity, reduced test generation time and test time, and shows that this testing method is a good alternative to existing testing schemes.
References
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Journal ArticleDOI

Detection of catastrophic faults in analog integrated circuits

TL;DR: The construction of a set of measurements that detects many faulty circuits before specification testing is described, and its effectiveness in detecting faulty circuits is evaluated.
Journal ArticleDOI

Analog circuit fault diagnosis based on sensitivity computation and functional testing

TL;DR: An approach based on functional testing and on sensitivity calculation of many output parameters for diagnosis of defective elements in analog circuits is presented and Experimental results are presented to clarify the algorithm and prove its efficiency in a practical case.
Proceedings ArticleDOI

Fault modeling for the testing of mixed integrated circuits

A. Meixner, +1 more
TL;DR: A fault- modeling methodology which could be applied to capture the malfunctioning of analog components in mixed IC's is introduced and a list of problems to be solved in the subsequent research dealing with testing of mixcd analog/digital integrated circuits.
Proceedings ArticleDOI

Optimal test set design for analog circuits

TL;DR: An algorithm is presented that reduces functional test sets to only those that are sufficient to find out whether a circuit contains a parametric fault, demonstrating that drastic reductions in test time can be achieved without sacrificing fault coverage.
Proceedings ArticleDOI

An experimental approach to analog fault models

TL;DR: In this paper, a comprehensive approach to model faults in analog circuits and systems based on experimental statistics of manufacturing defects is presented, and a case study based on a simple sample-and-hold circuit is discussed with specific results.
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