Patent
Method for fabricating an integrated circuit with multi-layer wiring having opening for fuse
TLDR
In this paper, a programmable integrated circuit has multi-layer wiring with openings over fuses, and a fabrication method forms the openings for each fuse, to avoid damage due to the blowing off of the fuses.Abstract:
A programmable integrated circuit has multi-layer wiring with openings over fuses, and a fabrication method forms the openings for each fuse, to avoid damage due to the blowing off of the fuses. The forming of the openings is performed by etching each insulating layer on the fuses after it is formed over the pre-formed wiring-layers. This results in shorter etching time as compared to the prior art etching method where the openings are etched in all the layers for the whole depth in one process step. Because of the shorter time necessary for each etching, overetching and side-etching are reduced, thus providing the openings with more accurately determined dimensions, which provides higher yield for manufacturing the device. The contact holes and the windows for the bonding pads in each insulating layer are etched in the same fabrication step for forming the openings for the fuses in the same insulating layer. This requires no additional fabrication processes for the IC and results in no increase of the fabrication time and cost.read more
Citations
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References
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Patent
Programmable read only memory cell having an electrically destructible programmation element integrally formed with a junction diode
TL;DR: A programmable read-only memory (PAM) as mentioned in this paper is a type of memory cell that includes a p-n junction diode and an electrically destructible programmation element which are integrally formed in the thin layer of semiconductor material.
Patent
Process for fabrication of fuse and interconnects
TL;DR: In this article, the necked portion of the fuse elements is removed by selective side etching to form tapering portions separated by a gap without etching of the interconnects.
Patent
Method for programming circuit elements in integrated circuits
Cecil J. Aswell,Hugh N. Chapman +1 more
TL;DR: In this article, a laser programmable logic switch (22) includes a fusible link (28), an output node (26), and a transistor (24) which is fabricated to be in the off state.
Patent
Method for producing a semiconductor device
T. Yabu,Masao Kanazawa +1 more
TL;DR: In this article, a method for producing a semiconductor device provided with a fuse is described, including the steps of forming a fuse layer on an insulating layer formed on a semiconducting substrate, forming an interrupting layer covering the fuse layer and the insulating layers, selectively etching the protective layer, so as to form a window, with a suitable etchant which does not etch the interrupting layers, and finally, exposing the exposed interruption layer to complete the window.
Patent
Programmable read only memory
Kersi F. Cooper,Jerry W. Drake +1 more
TL;DR: In this paper, a programmable memory element for read-only memory is described, which includes a nichrome fusible link with a first metallization layer formed in contact with the nichromatic link.