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Proceedings ArticleDOI

Minimum Energy Tracking Loop with Embedded DC-DC Converter Delivering Voltages down to 250mV in 65nm CMOS

TLDR
An energy minimization loop, with on-chip energy sensor circuitry, that can dynamically track the minimum energy operating voltage of a digital circuit with changing workload and operating conditions occupies 0.05mm2 in 65nm CMOS.
Abstract
An energy minimization loop, with on-chip energy sensor circuitry, that can dynamically track the minimum energy operating voltage of a digital circuit with changing workload and operating conditions occupies 0.05mm2 in 65nm CMOS. The DC-DC converter that enables this minimum energy operation can deliver load voltages as low as 250mV and achieved an efficiency >80% while delivering load powers of the order of 1 pW and higher from a 1.2V supply

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Citations
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Journal ArticleDOI

An efficient piezoelectric energy-harvesting interface circuit using a bias-flip rectifier and shared inductor

TL;DR: A bias-flip rectifier that can improve upon the power extraction capability of existing full-bridge rectifiers by up to 4.2× is presented and an efficient control circuit with embedded DC-DC converters that can share their filter inductor with the bias- FLIP rectifier thereby reducing the volume and component count of the overall solution is demonstrated.
Journal ArticleDOI

Ultralow-Power Electronics for Biomedical Applications

TL;DR: This work outlines the performance and power constraints of biomedical devices, and presents circuit techniques to achieve complete systems operating down to power levels of microwatts, and approaches that leverage advanced technology trends are emphasized.
Proceedings ArticleDOI

Voltage Scalable Switched Capacitor DC-DC Converter for Ultra-Low-Power On-Chip Applications

TL;DR: In this paper, a voltage scalable switched capacitor (SC) DC-DC converter with integrated on-chip charge-transfer capacitors was implemented in a 0.18 mum CMOS process and achieved above 70% efficiency over a wide range of load powers from 5 muW to 1 mW.
Journal ArticleDOI

Nanometer MOSFET Variation in Minimum Energy Subthreshold Circuits

TL;DR: In this article, the issues specific to both general logic and dense static random access memories are analyzed, and solutions that address their distinct design metrics are presented to manage their severe degradation.
Journal ArticleDOI

Energy-Efficient Subthreshold Processor Design

TL;DR: This paper proposes a new general-purpose sensor processor architecture, which is called the Subliminal Processor, optimized across different design stages including ISA definition, microarchitecture evaluation and circuit and implementation optimization.
References
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Journal ArticleDOI

A 180-mV subthreshold FFT processor using a minimum energy design methodology

TL;DR: New subthreshold logic and memory design methodologies are developed and demonstrated on a fast Fourier transform (FFT) processor that is designed to investigate the estimated minimum energy point.
Proceedings ArticleDOI

Characterizing and modeling minimum energy operation for subthreshold circuits

TL;DR: This paper examines energy minimization for circuits operating in the subthreshold region and shows the dependence of the optimum V/sub DD/ for a given technology on design characteristics and operating conditions.
Proceedings ArticleDOI

A 2.60pJ/Inst Subthreshold Sensor Processor for Optimal Energy Efficiency

TL;DR: The processor reaches maximum energy efficiency at 360mV, consuming 2.6pJ/Inst at 833kHz and the minimum energy consumption of the core marks a 10times improvement over previous sensor processors at the same MIPS.
Proceedings ArticleDOI

A 4/spl mu/A-quiescent-current dual-mode buck converter IC for cellular phone applications

TL;DR: In this article, a digitally controlled buck converter IC occupies 2 mm2 active area in 0.25mum CMOS, and the quiescent current is 4VA, representing more than a 3-fold improvement over the leading state-of-the-art analog approach.
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