Journal ArticleDOI
Non-Volatile Memory Based Hybrid Transactional Memory Technique Supporting Data Recovery
Hyeon-Guk Ma,Hyeong-Jin Kim,Jae-Hwan Shin,Jin-Su Chang,Jae-Woo Chang +4 more
- Vol. 25, Iss: 12, pp 628-633
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TLDR
A NVM-based hybrid transactional memory is proposed that provides data recovery on NVM and supports parallel processing between the fallback path and HTM path and shows an average performance improvement over NV-HTM in the STAMP benchmark.Abstract:
Transactional memory provides high performance and ease of maintenance by dividing the instruction set of a program into transactional units. However, data is lost if system failure occurs. To solve this problem, a non-volatile memory-based transactional memory called NV-HTM has been proposed. NV-HTM is a hardware transactional memory (HTM) that supports data recovery on NVM(Non-Volatile Memory) even in the event of system failure. However, since NV-HTM uses SGL as a fallback path, it cannot support parallel processing for transactions which fail using hardware transactional memory. Thus, in this paper, we propose a NVM-based hybrid transactional memory (DHyTM) that provides data recovery on NVM and supports parallel processing between the fallback path and HTM path. It is shown from the performance evaluation that the proposed DHyTM has demonstrated an average performance improvement of 270% over NV-HTM in the STAMP benchmark.read more
References
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Proceedings ArticleDOI
Transactional memory: architectural support for lock-free data structures
Maurice Herlihy,J. Eliot B. Moss +1 more
TL;DR: Simulation results show that transactional memory matches or outperforms the best known locking techniques for simple benchmarks, even in the absence of priority inversion, convoying, and deadlock.
Proceedings ArticleDOI
NOrec: streamlining STM by abolishing ownership records
TL;DR: An ownership-record-free software transactional memory (STM) system that combines extremely low overhead with unusually clean semantics is presented, and the experience suggests that NOrec may be an ideal candidate for such a software system.
Proceedings ArticleDOI
Quantitative comparison of hardware transactional memory for Blue Gene/Q, zEnterprise EC12, Intel Core, and POWER8
TL;DR: There is no single HTM system that is more scalable than the others in all of the benchmarks, there are measurable performance differences among the HTM systems in some benchmarks, and eachHTM system has its own implementation characteristics that limit its scalability.
Proceedings ArticleDOI
DHTM: durable hardware transactional memory
TL;DR: DHTM (durable hardware transactional memory) is the first complete and practical hardware based solution for ACID transactions that has the potential to significantly ease the burden of crash consistent programming.
Journal ArticleDOI
Persistent Transactional Memory
TL;DR: Persistent transactional memory dynamically tracks transactional updates to cache lines to ensure the ACI properties during cache flushes and leverages an undo log in NVM to ensure PTM can always consistently recover transactional data structures from a machine crash.