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Proceedings ArticleDOI

Self-checking and recovering microprocessor G100FTS for fault-tolerant systems

TLDR
The architecture and implementation of an application-specific processor, the G100FTS, designed for fault-tolerant systems are described, which drastically reduces the component count of a system and provides high system reliability.
Abstract
The architecture and implementation of an application-specific processor, the G100FTS, designed for fault-tolerant systems are described. The G100FTS integrates the core processor and the support module for fault-tolerant operation. The core processor is the 32-b microprocessor Gmicro/100 based on the TRON specifications. The support module provides a mechanism of error detection, a rollback operation that recovers a processor from a transient fault, diagnosis of faulty processors, and reconfiguration of a single processor system to make it operate continuously. The G100FTS drastically reduces the component count of a system and provides high system reliability. The G100FTS performs all the fault-tolerant operations in hardware and requires no dedicated programs for fault tolerance. The chip contains 805K transistors within a chip size of 13 mm /spl times/ 14 mm. A 1.0-/spl mu/m, double-metal CMOS technology was used.

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Citations
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Patent

Method and apparatus for correcting errors in computer systems

TL;DR: A computer implemented process for detecting errors in a computer system including the steps of executing sequences of instructions of a software program on each of a reference system (16) and a test system (15), detecting and recording state of the reference system and the test system at comparable points in the execution of the program.
Proceedings ArticleDOI

Experiments of faults on the "Happa" system and a proposal of backup RAM technique

TL;DR: On the "Happa" parallel microcomputer system, faults were experimentally examined for the boundary of its operating range and a backup RAM technique is proposed for bus faults.
References
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Journal ArticleDOI

Architecture of the TRON VLSI CPU

TL;DR: The TRON microprocessor has an open architecture, it will be expandable to 64-bit operations, and its design reflects the needs of a family of application-specific operating system kernels.
Journal ArticleDOI

Fault Tolerance Achieved in VLSI

TL;DR: This quad-modular redundant system offers a cost-effective alternative for supporting fault tolerance by incorporating hardware/software independence and five redundancy mechanisms to correct both transient and permanent errors.
Proceedings ArticleDOI

V60/V70 microprocessor and its systems support functions

TL;DR: Two advanced 32-bit microprocessors, the V60 and V70, and their support functions for operating systems and high-reliability systems are described, and a basic mechanism for high- Reliability-system implementation, called FRM (functional redundancy monitoring), is discussed.
Journal ArticleDOI

The Gmicro/100 32-bit microprocessor

TL;DR: The prejump mechanism, implemented as a hardware solution for the jump problem, executes benchmark programs 16.8% faster on the average and Optimized microinstructions permit bitmap-manipulation instructions to perform two to five times faster than the software loops.
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