Proceedings ArticleDOI
Side-channel attacks on the bitstream encryption mechanism of Altera Stratix II: facilitating black-box analysis using software reverse-engineering
Amir Moradi,David Oswald,Christof Paar,Pawel Swierczynski +3 more
- pp 91-100
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TLDR
This paper reverse-engineered the details of the proprietary and unpublished Stratix II bitstream encryption scheme from the Quartus II software and demonstrates that the full 128-bit AES key of a Stratx II can be recovered by means of side-channel analysis with 30,000 measurements, which can be acquired in less than three hours.Abstract:
In order to protect FPGA designs against IP theft and related issues such as product cloning, all major FPGA manufacturers offer a mechanism to encrypt the bitstream used to configure the FPGA. From a mathematical point of view, the employed encryption algorithms, e.g., AES or 3DES, are highly secure. However, recently it has been shown that the bitstream encryption feature of several FPGA product lines is susceptible to side-channel attacks that monitor the power consumption of the cryptographic module. In this paper, we present the first successful attack on the bitstream encryption of the Altera Stratix II FPGA. To this end, we reverse-engineered the details of the proprietary and unpublished Stratix II bitstream encryption scheme from the Quartus II software. Using this knowledge, we demonstrate that the full 128-bit AES key of a Stratix II can be recovered by means of side-channel analysis with 30,000 measurements, which can be acquired in less than three hours. The complete bitstream of a Stratix II that is (seemingly) protected by the bitstream encryption feature can hence fall into the hands of a competitor or criminal - possibly implying system-wide damage if confidential information such as proprietary encryption schemes or keys programmed into the FPGA are extracted. In addition to lost IP, reprogramming the attacked FPGA with modified code, for instance, to secretly plant a hardware trojan, is a particularly dangerous scenario for many security-critical applications.read more
Citations
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Journal ArticleDOI
FPGA Security: Motivations, Features, and Applications
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FPGA Trojans Through Detecting and Weakening of Cryptographic Primitives
TL;DR: This paper investigates a novel attack vector against cryptography realized on FPGAs, which poses a serious threat to real-world applications and demonstrates how a targeted bitstream modification can seriously weaken cryptographic algorithms.
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EM-based detection of hardware trojans on FPGAs
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Book ChapterDOI
No Place to Hide: Contactless Probing of Secret Data on FPGAs
TL;DR: Attacks based on Laser Voltage Probing (LVP) and its derivatives, as commonly used in Integrated Circuit (IC) debug for nanoscale low voltage technologies, are successfully launched against a 60 nanometer technology FPGA, the first time that LVP is used to perform an attack on secure ICs.
Proceedings ArticleDOI
Hardware reverse engineering: Overview and open challenges
Marc Fyrbiak,Sebastian Strauss,Christian Kison,Sebastian Wallat,Malte Elson,Nikol Rummel,Christof Paar +6 more
TL;DR: This work systematically study the current research branches related to hardware reverse engineering ranging from decapsulation to gate-level netlist analysis and proposes novel directions for future interdisciplinary research encompassing both technical and psychological perspectives that hold the promise to holistically capture the complexity of hardwarereverse engineering.
References
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Book ChapterDOI
Differential Power Analysis
TL;DR: In this paper, the authors examine specific methods for analyzing power consumption measurements to find secret keys from tamper resistant devices. And they also discuss approaches for building cryptosystems that can operate securely in existing hardware that leaks information.
Book ChapterDOI
Correlation Power Analysis with a Leakage Model
TL;DR: A classical model is used for the power consumption of cryptographic devices based on the Hamming distance of the data handled with regard to an unknown but constant reference state, which allows an optimal attack to be derived called Correlation Power Analysis.
Book
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
TL;DR: In this paper, the authors present a comprehensive treatment of power analysis attacks and countermeasures, based on the principle that the only way to defend against such attacks is to understand them.
Book
Power Analysis Attacks: Revealing the Secrets of Smart Cards
TL;DR: This volume explains how power analysis attacks work and provides an extensive discussion of countermeasures like shuffling, masking, and DPA-resistant logic styles to decide how to protect smart cards.
Book
Advanced Encryption Standard
TL;DR: The Advanced Encryption Standard (AES) is an encryption standard adopted by the U.S. government as mentioned in this paper, which has a 128-bit block size with key sizes of 128, 192 and 256 bits.