Journal ArticleDOI
Side-channel vulnerability factor: a metric for measuring information leakage
John Demme,Robert Martin,Adam Waksman,Simha Sethumadhavan +3 more
- Vol. 40, Iss: 3, pp 106-117
TLDR
SVF quantifies patterns in attackers' observations and measures their correlation to the victim's actual execution patterns and in doing so captures systems' vulnerability to side-channel attacks, providing a quantitative approach to secure computer architecture.Abstract:
There have been many attacks that exploit side-effects of program execution to expose secret information and many proposed countermeasures to protect against these attacks. However there is currently no systematic, holistic methodology for understanding information leakage. As a result, it is not well known how design decisions affect information leakage or the vulnerability of systems to side-channel attacks. In this paper, we propose a metric for measuring information leakage called the Side-channel Vulnerability Factor (SVF). SVF is based on our observation that all side-channel attacks ranging from physical to microarchitectural to software rely on recognizing leaked execution patterns. SVF quantifies patterns in attackers' observations and measures their correlation to the victim's actual execution patterns and in doing so captures systems' vulnerability to side-channel attacks. In a detailed case study of on-chip memory systems, SVF measurements help expose unexpected vulnerabilities in whole-system designs and shows how designers can make performance-security trade-offs. Thus, SVF provides a quantitative approach to secure computer architecture.read more
Citations
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Journal ArticleDOI
A Primer on Hardware Security: Models, Methods, and Metrics
TL;DR: This paper systematizes the current knowledge in this emerging field, including a classification of threat models, state-of-the-art defenses, and evaluation metrics for important hardware-based attacks.
Proceedings ArticleDOI
On the feasibility of online malware detection with performance counters
John Demme,Matthew H. Maycock,Jared Schmitz,Adrian Tang,Adam Waksman,Simha Sethumadhavan,Salvatore J. Stolfo +6 more
TL;DR: This paper examines the feasibility of building a malware detector in hardware using existing performance counters and finds that data from performance counters can be used to identify malware and that the detection techniques are robust to minor variations in malware programs.
Journal ArticleDOI
TimeWarp: rethinking timekeeping and performance monitoring mechanisms to mitigate side-channel attacks
TL;DR: The approach is to limit the fidelity of fine grain timekeeping and performance counters, making it difficult for an attacker to distinguish between different microarchitectural events, thus thwarting attacks.
Proceedings ArticleDOI
DEUCE: Write-Efficient Encryption for Non-Volatile Memories
TL;DR: Dual Counter Encryption (DEUCE) is proposed, based on the observation that a typical writeback only changes a few words, so DEUCE reencrypts only the words that have changed, which improves performance by 27% and increases lifetime by 2x.
Proceedings ArticleDOI
A Practical Methodology for Measuring the Side-Channel Signal Available to the Attacker for Instruction-Level Events
TL;DR: A new metric, which is called Signal Available to Attacker (SAVAT), that measures the side channel signal created by a specific single-instruction difference in program execution, i.e. the amount of signal made available to a potential attacker who wishes to decide whether the program has executed instruction/ event A or instruction/event B is presented.
References
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Book ChapterDOI
Differential Power Analysis
TL;DR: In this paper, the authors examine specific methods for analyzing power consumption measurements to find secret keys from tamper resistant devices. And they also discuss approaches for building cryptosystems that can operate securely in existing hardware that leaks information.
Posted Content
Cache attacks and Countermeasures: the Case of AES.
TL;DR: In this article, the authors describe side-channel attacks based on inter-process leakage through the state of the CPU's memory cache, which can be used for cryptanalysis of cryptographic primitives that employ data-dependent table lookups.
Book ChapterDOI
Cache attacks and countermeasures: the case of AES
TL;DR: In this article, the authors describe side-channel attacks based on inter-process leakage through the state of the CPU's memory cache, which can be used for cryptanalysis of cryptographic primitives that employ data-dependent table lookups.
Proceedings ArticleDOI
New cache designs for thwarting software cache-based side channel attacks
Zhenghong Wang,Ruby B. Lee +1 more
TL;DR: The results show that the new cache designs with built-in security can defend against cache-based side channel attacks in general-rather than only specific attacks on a given cryptographic algorithm-with very little performance degradation and hardware cost.
Journal ArticleDOI
Effective hardware-based data prefetching for high-performance processors
Tien-Fu Chen,Jean-Loup Baer +1 more
TL;DR: The results show that the three hardware prefetching schemes all yield significant reductions in the data access penalty when compared with regular caches, the benefits are greater when the hardware assist augments small on-chip caches, and the lookahead scheme is the preferred one cost-performance wise.