The glitch PUF: a new delay-PUF architecture exploiting glitch shapes
Daisuke Suzuki,Koichi Shimizu +1 more
- pp 366-382
Reads0
Chats0
TLDR
A new Delay-PUF architecture that is expected to solve the current problem of Delay- PUF that it is easy to predict the relation between delay information and generated information is proposed, and the evaluation results on the randomness and statistical properties are shown.Abstract:
In this paper we propose a new Delay-PUF architecture that is expected to solve the current problem of Delay-PUF that it is easy to predict the relation between delay information and generated information. Our architecture exploits glitches that behave non-linearly from delay variation between gates and the characteristic of pulse propagation of each gate. We call this architecture Glitch PUF. In this paper, we present a concrete structure of Glitch PUF. We then show the evaluation results on the randomness and statistical properties of Glitch PUF. In addition, we present a simple scheme to evaluate Delay-PUFs by simulation at the design stage. We show the consistency of the evaluation results for real chips and those by simulation for Glitch PUF.read more
Citations
More filters
Book ChapterDOI
A Systematic Method to Evaluate and Compare the Performance of Physical Unclonable Functions
TL;DR: A systematic method to evaluate and compare the performance of physical unclonable functions (PUFs) using measured data from PUF implementations in state-of-the-art FPGAs and focuses on the statistical properties of the binary PUF responses.
Book
Physically Unclonable Functions: Constructions, Properties and Applications
TL;DR: The author presents a fully functional prototype implementation of a PUF-based cryptographic key generator, demonstrating the full benefit of using PUFs and the efficiency of the processing techniques described.
Book ChapterDOI
Security Based on Physical Unclonability and Disorder
TL;DR: This chapter provides a classification for past and ongoing work in physical disorder based security alongside with security analyses and implementation examples and outlines some open problems and future research opportunities.
Proceedings ArticleDOI
Side channel modeling attacks on 65nm arbiter PUFs exploiting CMOS device noise
TL;DR: This paper exploits repeatability imperfections of PUF responses as a side channel for model building and demonstrates that 65nm CMOS arbiter PUFs can be modeled successfully, without utilizing any ML algorithm.
References
More filters
Proceedings ArticleDOI
Physical unclonable functions for device authentication and secret key generation
G. Edward Suh,Srinivas Devadas +1 more
TL;DR: This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.
Proceedings Article
Physical Unclonable Functions for Device Authentication and Secret Key Generation
Book ChapterDOI
Fuzzy extractors: How to generate strong keys from biometrics and other noisy data
TL;DR: This work provides formal definitions and efficient secure techniques for turning biometric information into keys usable for any cryptographic application, and reliably and securely authenticating biometric data.
Journal ArticleDOI
Physical one-way functions
TL;DR: The concept of fabrication complexity is introduced as a way of quantifying the difficulty of materially cloning physical systems with arbitrary internal states as primitives for physical analogs of cryptosystems.
Proceedings ArticleDOI
Silicon physical random functions
TL;DR: It is argued that a complex integrated circuit can be viewed as a silicon PUF and a technique to identify and authenticate individual integrated circuits (ICs) is described.