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Book ChapterDOI

Trace-driven cache attacks on AES (short paper)

TLDR
This paper presents an efficient trace-driven cache attack on a widely used implementation of the AES cryptosystem, and develops an accurate mathematical model that is used in the cost analysis of the attack.
Abstract
Cache based side-channel attacks have recently been attracted significant attention due to the new developments in the field. In this paper, we present an efficient trace-driven cache attack on a widely used implementation of the AES cryptosystem. We also evaluate the cost of the proposed attack in detail under the assumption of a noiseless environment. We develop an accurate mathematical model that we use in the cost analysis of our attack. We use two different metrics, specifically, the expected number of necessary traces and the cost of the analysis phase, for the cost evaluation purposes. Each of these metrics represents the cost of a different phase of the attack.

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Citations
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Book ChapterDOI

Secure Cryptography Integration: NoC-Based Microarchitectural Attacks and Countermeasures

TL;DR: In this paper, the authors provide a wide and detailed description of the micro-architectural NoC-based attacks and present the applicability of these attacks on current and future cryptographic primitives.
Proceedings ArticleDOI

Flush+Time: A High Accuracy and High Resolution Cache Attack On ARM-FPGA Embedded SoC

TL;DR: This work proposes a high accuracy, high resolution flush based cache attack, Flush+Time, which solves two important challenges for cache attacks on ARM: how to flush cache lines and how to achieve precise timing.

Design and implementation of a cryptographic unit for efficient, secure and trusted execution of cryptographic algorithms

TL;DR: It is demonstrated that the execution of AES encryption can be performed inside the cryptographic unit without any secret and/or sensitive information ever leaving the cryptographicunit during the entire computation, and the entire cryptographic computation itself are protected against many powerful attacks.

Statistics in Side Channel Analysis -Modeling, Metric, Leakage Detection Testing

Liwei Zhang
TL;DR: A general statistical model is built and an analytic success rate formula of ML attack is derived that distinctively shows the effects of algorithmic confusion property and signal-noise-ratio in higher-order power analysis attacks in very noisy scenarios.
References
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Book ChapterDOI

Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems

TL;DR: By carefully measuring the amount of time required to perform private key operalions, attackers may be able to find fixed Diffie-Hellman exponents, factor RSA keys, and break other cryptosystems.
BookDOI

The Design of Rijndael

TL;DR: This volume is the authoritative guide to the Rijndael algorithm and AES and professionals, researchers, and students active or interested in data encryption will find it a valuable source of information and reference.
Book ChapterDOI

Cache attacks and countermeasures: the case of AES

TL;DR: In this article, the authors describe side-channel attacks based on inter-process leakage through the state of the CPU's memory cache, which can be used for cryptanalysis of cryptographic primitives that employ data-dependent table lookups.
Proceedings Article

Remote timing attacks are practical

TL;DR: This work devise a timing attack against OpenSSL that can extract private keys from an OpenSSL-based web server running on a machine in the local network.
Book ChapterDOI

Cache-collision timing attacks against AES

TL;DR: The most powerful attack has been shown under optimal conditions to reliably recover a full 128-bit AES key with 213 timing samples, an improvement of almost four orders of magnitude over the best previously published attacks of this type.