Journal ArticleDOI
Using Dummy Bridging Faults to Define Reduced Sets of Target Faults
Irith Pomeranz,Sudhakar M. Reddy +1 more
TLDR
The introduction of dummy bridging faults, which are not physical faults but whose tests detect large numbers of physical faults, are introduced and the proposed approach selects a subset of faults such that if they are detected, all the four-way bridges faults are guaranteed to be detected.Abstract:
To address the large numbers of bridging faults in a circuit, several approaches have been proposed for the selection of subsets of bridging faults as targets for test generation. A different approach that can be viewed as a fault collapsing method based on dominance relations between faults is investigated. It is enhanced by the introduction of dummy bridging faults, which are not real faults but whose tests detect large numbers of real faults. This approach is applied to nonfeedback four-way bridging faults. When no approximations are made, the proposed approach selects a subset of faults such that if they are detected all the nonfeedback four-way bridging faults are guaranteed to be detected. When this subset is too large, the proposed approach can also be applied to a subset of bridging faults preselected using other methods, e.g., realistic bridging faults or hard-to-detect bridging faults. In this case, it allows more bridging faults to be preselected. A new selection criterion and issues related to test generation for the selected faults are also investigatedread more
Citations
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Proceedings ArticleDOI
Comparing the effectiveness of deterministic bridge fault and multiple-detect stuck fault patterns for physical bridge defects: A simulation and silicon study
TL;DR: A comprehensive comparative analysis about the effectiveness of deterministic bridge fault patterns and n-detect patterns for two large designs (90 and 65nm) shows that extracting different types of bridge faults is required as they represent different unique defect sites.
Proceedings ArticleDOI
Safe Fault Collapsing Based on Dominance Relations
Irith Pomeranz,Sudhakar M. Reddy +1 more
TL;DR: A procedure for computing safe collapsed fault sets, and experimental results of test generation for four-way bridging faults are presented.
Journal ArticleDOI
Fault Detection of Bridging Faults in Digital Circuits by Shared Binary Decision Diagram
Ling Chen,Zhong Liang Pan +1 more
TL;DR: A new test generation method for the bridging faults in digital circuits is proposed in this paper, the method is based on shared binary decision diagram and can get the test vectors of the Bridging faults if the faults are testable.
Journal ArticleDOI
On Detection of Bridge Defects with Stuck-at Tests
TL;DR: This paper proposes a method to detect bridge defects with a test set initially generated for stuck-at faults in a full scan sequential circuit, and shows that the proposed method increases the defect coverage.
References
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Book
Digital Systems Testing and Testable Design
TL;DR: The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
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Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional Logic
M.J.Y. Williams,J.B. Angell +1 more
TL;DR: With the increasing complexity of logic that can be fabricated on a single large-scale integrated (LSI) circuit chip, there is a growing problem of checking the logical behavior of the chips at manufacture.
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A CMOS fault extractor for inductive fault analysis
F.J. Ferguson,John Paul Shen +1 more
TL;DR: This analysis shows that the traditional SSA fault model characterizes fewer than half of the faults extracted by FXT; graph-theoretic techniques provide little improvement in the percentage of realistic faults modeled.
Proceedings ArticleDOI
Biased voting: A method for simulating CMOS bridging faults in the presence of variable gate logic thresholds
TL;DR: A general technique which can be used to determine if a particular structure of transistors gives rise to a bridge voltage which is higher or lower than a given threshold, in most cases without requiring circuit simulation.
Proceedings ArticleDOI
Resistive bridge fault modeling, simulation and test generation
V.R. Sar-Dessai,Duncan M. Walker +1 more
TL;DR: In this article, the authors developed a model of resistive bridging faults and studied the fault coverage on ISCAS85 circuits of different test sets using resistive and zero-ohm bridges at different supply voltages.
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Using dummy bridging faults to define a reduced set of target faults
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