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The proposed architectures exhibit significantly reduced complexity over ROM-based ones.
Journal ArticleDOI
Bipul C. Paul, S. Fujita, Mutsumi Okajima 
03 Nov 2009
29 Citations
This demonstrates the low-power operation of the ROM-based multiplier also at higher frequencies.
Journal ArticleDOI
51 Citations
These are the fastest silicon transistors reported to date in terms of both fT and fmax figures.
The proposed methods can be easily incorporated into the ROM BIST architectures.
The transistors are scalable because of the thin silicon technology and the memories are highly scalable because they allow efficient coupling between the carriers and storage region.
Proceedings ArticleDOI
R. Heald, P. Wang 
07 Nov 2004
131 Citations
Hence, the small transistors in SRAM cells are particularly sensitive to these variations.
Our findings paint a picture of BTI and TDDB that in many respects is similar to that of Si transistors but with some unique characteristics.
The data are consistent with the formation of parasitic transistors resulting from the microdose deposited in the gate oxides of these devices by the heavy ions.
Proceedings ArticleDOI
17 Nov 2008
27 Citations
A test circuit fabricated in a carefully-selected 0.18 mum CMOS technology reveals that our proposed static NAND ROM structure improves performance by 26X, energy by 3.8X and lowest functional supply voltage by 100 mV over a conventional dynamic NAND ROM.