Showing papers on "Diffusion capacitance published in 1980"

Properties of ion-implanted junctions in mercury—cadmium—telluride

Abstract: The formation of n-p junctions by ion-implantation in Hg 0.71 Cd 0.29 Te is shown to be a result of implantation damage. n-p photodiodes have been made by implantation of Ar, B, Al, and P in a p-type substrate with acceptor concentration of 4 × 1016cm-3. The implanted n-type layer is characterized by sheet electron concentration of 1014to 1015cm-2and electron mobility higher than 103cm2. V-1. s-1, for ion doses in the range 1013-5 × 1014cm-2. The photodiodes have a spectral cutoff of 5.2 µm, quantum efficiency higher than 80 percent, and differential resistance by area product above 2000 Ω . cm2at 77 K. The temperature dependence of the differential resistance is discussed. The junction capacitance dependence on reverse voltage fits a linearly graded junction model. Reverse current characteristics at 77 K have been investigated using gate-controlled diodes. The results suggest that reverse breakdown is dominated by interband tunneling in field-induced junctions at the surface, for both polarities of surface potential.

Driver circuit for charge coupled device

Abstract: A driver circuit for a charge coupled device which includes a CMOS inverter including a P channel MOS transistor and an N channel MOS transistor for inverting the level of an input control pulse, an output terminal of the CMOS inverter being connected to a charge coupled device such that the P channel MOS transistor functions to charge the equivalent load capacitance of the charge coupled device and the N channel MOS transistor functions to discharge the equivalent load capacitance. A continuously variable DC power supply is provided for applying a variable gate voltage to the gate of at least one of the P and N channel MOS transistors to change the mutual conductance of the transistor so that the time constant of the charge or discharge circuit to the load capacitance can be adjusted to optimize the charge transfer efficiency of the charged coupled device.

Zn Diffusion in InxGa1-xAs with ZnAs2 Source

Abstract: By using ZnAs2 as a diffusion source, Zn has been diffused into InxGa1-xAs over the whole range of composition x at temperatures between 500°C and 600°C. The measured activation energy and crystal composition dependence of the diffusion coefficients and Zn surface concentration are compared with the two diffusion models so far proposed and are found to agree with the interstitial (Zni2+)-substitutional (Zns-) model. Empirical formulas describing the dependence of junction depth, hole concentration, hole mobility and diffused layer resistivity on crystal composition x, diffusion time t and temperature T are derived. Planar photodiodes, fabricated by preferential Zn diffusion in InxGa1-xAs VPE layers, exhibit microplasma-free uniform breakdown with higher breakdown voltage than 100 V, low junction capacitance of 0.24 pF for 100 µm diameter and low dark current density of 10-6 to 10-5 A/cm2.

Capacitance studies of the depletion region in hydrogenated a-Si Schottky barrier solar cells

Abstract: The frequency dependence of the capacitance of a-SiH x Schottky barrier solar cells, in the frequency range 1–10 5 Hz, is interpreted in terms of a simple model based on the spatial variation of the resistivity in the junction region. This interpretation is found to be consistent with the dependence of the capacitance on temperature, illumination and bias. From the capacitance measurements, we are able to derive the potential profile in the space charge region and the density of states in the gap.

Semiconductor capacitor type pressure sensor

Abstract: PURPOSE:To eliminate the influence of temperature on a semiconductor capacitor type pressure sensor by a method wherein an amplifier is provided at a part of the upper face of an Si substrate, and a concave notch part at another part, capacitor electrodes are provided on the face of an insulating cap to be joined to the substrate facing with the concave notch part, and pressure is detected and amplified as electric capacity. CONSTITUTION:B ions are made to diffuse in a part of the Si substrate 20 to provide an IC amplifier 21, and another part of the substrate is etched with alkali to form the concave notch part 22. An oxide film 23 and a polycrystalline Si layer 24 are formed in order on the whole surface of the substrate excluding the concave notch part 22, and the cap 25 consisted of Pyrex glass is adhered on the polycrystalline Si layer 24 to seal. The electrodes 27, 28 are provided on the face of the cap 25 facing with the concave notch part to form capacitance between substrate 20, deformation of the substrate 20 by pressure A is detected as capacitance, and is amplified to be outputted to outside terminals 36, 37. Accordingly because no component of P-N junction capacitance is contained in the detected value of capacitance, variation of capacitance to be caused by the circumferential temperature can be reduced, and the sensor having high accuracy can be obtained.

Electrical Capacitance of Polyethylene under Application of High DC Electric Field

Abstract: An increase in the electrical capacitance of polyethylene is detected when a high dc electric field is applied with a variable-frequency oscillator. The increment of capacitance increases in proportion to the square of the applied field and changes reversibly below about 30 MV/m for gold electrodes. This change in capacitance is due to the effect of electromechanical compressive stress. Above 30 MV/m, the capacitance undergoes an irreversible change and the increase in capacitance is discussed in terms of the polarization of trapped electronic space charges injected from the electrode. In the region above about 90 MV/m, where the conduction current obeys Child's law, the increment of capacitance with field again becomes proportional to the square of the applied field and may be explained by free carrier polarization.

Light detecting photodiode-MIS transistor device

Abstract: A light detector device comprises at least one pair made up of a light sensitive photodiode and a light signal reading MIS transistor switch The pair is formed on an insulating substrate such as sapphire The source region of the MIS transistor switch is contiguous with a photosensitive pn junction of the photodiode The source, drain and channel regions of the MIS transistor switch reach the insulating substrate, thereby reducing the area of pn junction of the MIS transistor and hence the junction capacitance so that high signal output is available from the photodiode with high S/N ratio

Storage system having bilateral field effect transistor personalization

Abstract: A storage system, such as a read only memory, is provided which includes field effect transistors each having first and second spaced apart diffusion regions of a given conductivity and a gate electrode, with at least one of the two diffusion regions of selected transistors having a third diffusion adjacent to one of the first and second diffusion regions under the gate electrodes to provide a higher voltage threshold for the gate electrode to one diffusion than for the gate electrode to the other of the two diffusions. A voltage is applied to the first diffusion having a polarity and magnitude sufficient to neutralize or eliminate the effects of the higher threshold during a first time period and the current flowing between the first and second diffusions is sensed. During a second period of time the voltage is applied to the second diffusion and the current flow between the first and second diffusions is again sensed. In this manner two cells or bits of information are stored in each transistor, one at the first diffusion and one at the second diffusion. Multilevel storing may also be employed by establishing one of more than two predetermined voltage thresholds at each of the first and second diffusions.

High Speed Bipolar ICs Using Super Self-aligned Process Technology

Abstract: We have developed a new bipolar process technology, called SST. The emitter region, base p region, base p+ region, base p+ polysilicon electrode and emitter contact window of NPN transistor are formed by one mask photolithography process. The transistor active regions are all self-aligned. Therefore, small-size transistors can be realized and high performance is achieved by the decreased collector-base junction capacitance. A new bipolar integrated circuit using SST gave a 63 ps/gate propagation delay time and 0.043 pJ/gate speed-power product.

Process design using coupled 2D process and device simulators

Abstract: A novel 2D process simulator has been developed which can handle local oxidation, implantation through arbitrary mask edges, non-planar surfaces, and high concentration diffusion. Through coupling of 2D process and device simulators, simple power law dependencies relating breakdown voltage and perimeter junction capacitance to field implantation dose and local oxidation time have been obtained.

Semiconductor device and its manufacturing method

Abstract: PURPOSE:To improve on the propagation delay time in a bipolar transistor to be used for an ultra-high speed logical LSI by reducing the junction capacitance of a collector substrate. CONSTITUTION:A flush-type layer 103, a channel-cut region 107 and an oxidized film 102 are formed on the surface of the substrate 101 which consists of p-type silicon of low concentration. An epitaxial layer is grown on the above formation. At this time, the epitaxial layer grown on the silicon single crystal becomes a single crystal 104. Then the active region alone of the transistor consisting of a passive base region 111 of high concentration, an emitter region 112 and a contact region 113 are formed in the single crystal. This solves the problem of leakage which arises during polycrystallization, and as the separate pressure resistance between elements is set by the channel-cut section 107 and the section without a channel-cut, the collector substrate junction capacitance is lessened, thereby giving an improvement in propagation delay time.

Silicon photodiode for optical channel waveguides

Abstract: An etched mesa silicon photodiode suitable for detecting light propagating in optical channel waveguides has been fabricated. The diode width of 7 μm was slightly less than that of the channel waveguide, thus minimizing junction capacitance and the effect of detection noise caused by unguided substrate light. The fabrication technique can be applied to produce on a single Si wafer multiple photodiodes electrically isolated from each other. Optical energy was coupled from (out‐diffused)LiNbO3 channel waveguides into the photodiodes by means of evanescent field coupling.

Admittance-voltage characteristic of an MOS capacitor formed over p-on-n semiconductor structure

Abstract: A distributed RC transmission line analysis is extended to facilitate numerical computations and to include the device configuration where a resistive sheet is located between an oxide capacitance and a junction capacitance. General expressions of gate admittance for arbitrary electrode shape are given. The results of calculations for a square electrode explain well the anomalous experimental result. The sheet conductance of the resistive sheet is obtained as a function of gate bias.

Semiconductor memory storage

Abstract: PURPOSE:To prevent the generation of information inversion by a method wherein one side of capacity between the collector substrates of each transistor forming the FF of a memory cell and capacity between collector bases is made larger than the corresponding capacity of a transistor of a peripheral circuit. CONSTITUTION:Holes are opened to an oxide film on a P-type substrate, a P -layer is formed to one hole, and N diffusion layers 36, 37 are made up to both holes. The oxide film is removed, an N epitaxial layer is built up, the epitaxial layer is separated by an oxide film 39, and a P channel stopper 40 is formed to the lower portion. N Collector extracting layers 41, 42, P-type bases 43, 44 and N -type emitters 45, 46 are selectively made up. The whole is coated with PSG, holes are selectively opened, and electrodes are formed. Thus, the base 44 and the collector extracting layer 42 are contacted and junction capacitance is increased in a memory transistor, and contact between the collector extracting layer 41 and the base 43 is prevented and the increase of junction capacitance is suppressed in a transistor of a peripheral circuit. According to this constitution, the junction capacitance C1-C3 of a memory increases, and the generation of information inversion by natural radiation, the inversion of the potential of collectors, is prevented.

Field effect type transistor

Abstract: PURPOSE:To reduce capacity in island semiconductor layer on an insulating substrate by lowering the surface level more at the high concentration source and drain layers than at the semiconductor area forming the gate insulating layer. CONSTITUTION:Te-containing n-type GaAs35 is formed on a Fe-containing insulating GaAs substrate 36, and Pt electrode 31 is formed on an anodi-oxidationally formed GaO layer 32. Further, a Zn-diffused p -layers 33, 34 are formed with their main surface being formed at a level lower than the layer 35 having the gate insulating layer 32. The structure reduces the junction capacitance and decreases overlapping of the layers 33, 34 and the gate 31 although the source and drain layers 33, 34 have reached the surface of the insulating substrate 36. As such, this decreases both the source-to-drain junction capacitance and the capacitance due to overlapping of source-drain and gate-drain, thus answering the problem heretofore difficult to solve.

Variable attenuation circuit

Abstract: PURPOSE:To obtain the broad attenuation dynamic performance even at high frequency region, by using the diode in which the conductance can be varied with the control voltage and using the tuning circuit in resonance with the junction capacity. CONSTITUTION:When the control input voltage is low, the conductance g of the diodes D1 to D4 is minimum and the input signal reaches the transistor TR via the tuning coil L1 and the resistor R2, showing minimum attenuation. The loss by the diode junction capacitance and circuit stray capacitance can be improved by constituting the constant K filter by adding the tuning coils L1 and L2. When the control input voltage is high, g is maximum, the ratio of g of the resistors R1,R2 to the diodes D1,D2,D3,D4 is maximum to obtain the maximum attenuation. With this constitution, the resistors R1,R2 can be selected greater, and simultaneously, by using the change in the attenuation of the constant K type filter LPF consisting of the tuning coils L1,L2 depending on the change in the diode junction capacitance, the broad attenuation dynamic performance can be obtained.

Voltage control type oscillation circuit

Abstract: PURPOSE:To make equal the accuracy of the high frequency oscillator as that of a crystal oscillator with a simple constitution, by changing the oscillation frequency through the voltage dependancy of the junction capacitance between the base and the collector of the transistors of circuit integration. CONSTITUTION:The transistors Q31, 32 constituting the amplifier have common connected emitter and are connected to the current source 33. The base of Q31 is grounded via the capacitance 34 and the collector is connected to the tank circuit consisting of the inductance 35 and the capacitance 36. This tank circuit is connected to the collector of Q32 and grounded via the capacitor 37. Further, feedback is given from the collector of Q31 to the base of Q32 via the capacitor 38. On the other hand, the oscillation frequency control circuit 39 feeds DC voltage to the base of Q31, 32 via the bias resistors 40, 41 to change the junction capacitance between the base and the collector of Q31, 32, allowing to change the oscillation frequency of the oscillation circuit.

Quadrature detection circuit

Abstract: PURPOSE:To make stable the parasitic capacitance between the base and collector of Tr and to increase the characteristics for detection, by connecting the collector of the emitter follower transistor Tr to obtain the switching single to the constant voltage source. CONSTITUTION:The phase circuit 1 consists of the tuning circuit to FM carrier and the phase shift circuit delaying the phase by 90 deg. to the center frequency, and the output from the circuit enters the multiplication circuit 2 via the buffer amplifier 3 as the switching signal. The amplifier 3 prevents the effect of impedance at the circuit 2 to the circuit 1, and it consists of TrQ8, Q9, and emitter resistors R6 and R7, and the collector voltage is fixed at the constant voltage source circuit 4 to keep a constant and small value for the junction capacitance between the base and collector of TrQ8, Q9. Thus, the variation of the tuning frequency at the circuit 1 is avoided to obtain excellent detection characteristics.

Semiconductor integrated circuit device

Abstract: PURPOSE:To make a junction capacitance CCB between collector and base of a semiconductor small enough and reduce the delay time of propagation by a method wherein a p -layer is formed under an insulating layer surrounding an n -collector- layer of I L without come in contact with the collector layer. CONSTITUTION:An n epitaxial layer 2 is formed on a p-type Si substrate 1 buried with n -layers 20, 21, an Si3N4 mask 22 is put on an SiO2 film made on its surface and grooves 24 are etched reaching to the buried layers. After the grooves 24 are filled with SiO2, the mask 22 are curtailed and etching is performed. p -layers are formed in the n-layer 2, and are covered with SiO2 films 24'. Ion implantation is performed against a region surrounded with the p -layer 25, a p-layer 26 is formed leaving the surface part and a p-layer 8 is formed in the same way being contact with a p -layer 6. Openings are made selectively to form n -layers 7, 27 and 30, and electrodes are formed selectively. By this constitution, p n -junction constituted by direct touch of layers 7 and 6 does not exist, a great junction capacitance CCB is avoided and the propagation time is shortened. Moreover the generation of crystal defect originated from p n -junction is avoided, and the noise is reduced.