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Showing papers on "Etching (microfabrication) published in 1979"


Journal ArticleDOI
TL;DR: In this article, a miniature gas analysis system based on the principles of gas chromatography (GC) has been built in silicon using photolithography and chemical etching techniques, which allows size reductions of nearly three orders of magnitude compared to conventional laboratory instruments.
Abstract: A miniature gas analysis system has been built based on the principles of gas chromatography (GC). The major components are fabricated in silicon using photolithography and chemical etching techniques, which allows size reductions of nearly three orders of magnitude compared to conventional laboratory instruments. The chromatography system consists of a sample injection valve and a 1.5-m-long separating capillary column, which are fabricated on a substrate silicon wafer. The output thermal conductivity detector is separately batch fabricated and integrably mounted on the substrate wafer. The theory of gas chromatography has been used to optimize the performance of the sensor so that separations of gaseous hydrocarbon mixtures are performed in less than 10 s. The system is expected to find application in the areas of portable ambient air quality monitors, implanted biological experiments, and planetary probes.

1,414 citations


Journal ArticleDOI
TL;DR: In this paper, the extent to which gas surface chemical reactions can be enhanced by energetic radiation (primarily ions and electrons) incident on the surface is described and some technological implications of this process in plasma etching technology and lithography are considered.
Abstract: The extent to which gas‐surface chemical reactions can be enhanced by energetic radiation (primarily ions and electrons) incident on the surface is described. Emphasis is placed on chemical systems which lead to volatile reaction products. In particular, the reactions of Si, SiO2, and Si3N4 with XeF2, F2, and Cl2 are examined experimentally. Possible mechanisms for the radiation‐induced enhancement are discussed and some technological implications of this process in plasma etching technology and lithography are considered.

660 citations


Journal ArticleDOI
J. W. Coburn1, Harold F. Winters1
TL;DR: In this paper, the etching process is discussed in terms of three basic steps: adsorption, product formation, and product desorption with the goal of clarifying the relative importance of these three steps.
Abstract: The purpose of the present paper is to review the salient features of our understanding of phenomena which occur in plasma etching situations. The etching process is discussed in terms of three basic steps: adsorption, product formation, and product desorption. Experiments performed in well‐defined (nonplasma) environments are discussed with the goal of clarifying the relative importance of these three steps in the etching process. An attempt is made to relate the resulting concepts to several phenomena generally observed in plasma situations (e.g. etching anisotropy, selective etching, the loading effect, and the role of additive gases). Moreover, the glow discharge, in addition to generating active species which initiate the chemical reactions, also causes the etched surface to be subjected to energetic particle (ions, electrons) bombardment. The role of this radiation in the etching process is emphasized. Speculative comments relating to plasma etching parameters and apparatus are also given.

484 citations


Journal ArticleDOI
TL;DR: In this article, it was shown that silicon is isotropically etched by exposure to XeF2(gas) at T = 300 K. The implication of these experimental results for understanding mechanisms associated with plasma etching (including RIE) will be discussed.
Abstract: It is shown that silicon is isotropically etched by exposure to XeF2(gas) at T=300 K. Si etch rates as large as 7000 A/min were observed for P (XeF2) <1.4×10−2 Torr and the etch rate varies linearly with P (XeF2). There was no observable etching of SiO2, Si3N4, or SiC, demonstrating an extremely large selectivity between silicon and its compounds. Therefore, thin masks constructed from silicon compounds can be used for pattern delineation. The implication of these experimental results for understanding mechanisms associated with plasma etching (including RIE) will be discussed.

456 citations


Patent
18 May 1979
TL;DR: In this article, a plasma reactor is proposed to provide improved uniformity of etching and having a totally active reaction volume, where the reaction takes place only between the electrodes; there is no inactive space surrounding the electrodes to fill with plasma.
Abstract: A plasma reactor apparatus providing improved uniformity of etching and having a totally active reaction volume. The reactor apparatus is comprised of two electrically separated electrodes which bound a reaction volume. The topmost electrode functions as both a gas distribution manifold for uniformly injecting reactant gases into the reaction volume and as an exhaust manifold for uniformly withdrawing reaction products from the reaction volume. The two electrodes are so configured that the plasma reaction takes place only between the electrodes; there is no inactive space surrounding the electrodes to fill with plasma. The configuration is thus conservative of both reactants and energy. The bottommost plate which serves as a workpiece holder is movable with respect to the upper plate to permit loading and unloading of workpieces. The uppermost plate is the active RF electrode while the workpiece holder is maintained at a RF ground potential. The uppermost plate has a larger electrode area which effectively imposes a dc offset to the RF field which enhances the uniformity of the etching and decreases the undesirable spread of undercut etching.

429 citations


Journal ArticleDOI
TL;DR: In this article, the orientation of overlayer films induced by artificial surface patterns was proposed as graphoepitaxy, which is a special case of graphopitaxy induced by surface patterns.
Abstract: Uniform crystallographic orientation of silicon films, 500 nm thick, has been achieved on amorphous fused‐silica substrates by laser crystallization of amorphous silicon deposited over surface‐relief gratings etched into the substrates. The gratings had a square‐wave cross section with a 3.8‐μm spatial period and a 100‐nm depth. The 〈100〉 directions in the silicon were parallel to the grating and perpendicular to the substrate plane. We propose that orientation of overlayer films induced by artificial surface patterns be called graphoepitaxy.

270 citations




Patent
21 Feb 1979
TL;DR: In this paper, an improved Reactive Ion Etch (RIE) technique for etching polysilicon or single crystal silicon is described. But it is not applicable to device processing in which micron or sub-micron sized lines must be fabricated to extremely close tolerances.
Abstract: Disclosed is an improved Reactive Ion Etch (RIE) technique for etching polysilicon or single crystal silicon as must be done in Very Large Scale Integration (VLSI) using silicon technology. It teaches the use of an etch gas that consists of a mixture of sulfur hexafluoride (SF 6 ) and chlorine (Cl 2 ) diluted with inert gas. This etch gas allows an RIE process which combines the very desirable features of selectivity (high Si/SiO 2 etch rate ratio) and directionality which creates vertical side walls on the etched features. Vertical side walls mean no mask undercutting, hence zero etch bias. It is particularly applicable to device processing in which micron or sub-micron sized lines must be fabricated to extremely close tolerances. It is a distinct improvement over wet chemical etching or plasma etching as it is conventionally applied.

181 citations


Journal ArticleDOI
D. G. Schimmel1
TL;DR: In this article, a new defect etch formulation was developed for evaluating Si ingot material which does not require ultrasonic agitation, and the etching time compared to Secco etch with ultrasonics is reduced by one-half in developing etch pits of equivalent size.
Abstract: The Secco etch, with ultrasonic agitation, is widely used to determine dislocation densities in Si. Experiments have shown that under certain conditions, the cavitation of the ultrasonics can generate anomalous defect etch pits. A new defect etch formulation was developed for evaluating Si ingot material which does not require ultrasonic agitation. It consists of . The etching time compared to Secco etch with ultrasonics is reduced by one‐half in developing etch pits of equivalent size. This composition is useful for revealing dislocations in 0.6–15 Ωcm n‐ and p‐type silicon. In addition, dislocation etch pits are readily developed in more heavily doped Si crystals using a mixture of.

174 citations


Journal ArticleDOI
TL;DR: In this article, a simple model for predicting etch rates on sloped surfaces and sidewall profiles is described, which is critical for the successful application of ion-beam etching to patterning high-density integrated circuits.
Abstract: The trend in the microelectronics industry, and in particular that part of the industry concerned with the fabrication of integrated circuits, is toward circuits with increasingly high density and devices with smaller feature size. This trend has spurred interest in several new process technologies for pattern replication. One such emerging technology is ion‐beam etching that offers higher resolution, greater dimensional control, and higher yield than conventional wet chemical etching. Several examples of surface relief formation by ion‐beam etching illustrate the advantage of this approach. The particular limitations imposed by ion‐beam etching, namely mask erosion and faceting, redeposition, and trenching, are treated. Developments of simple models for predicting etch rates on sloped surfaces and sidewall profiles are described. Such models are critical for the successful application of ion‐beam etching to patterning high‐density integrated circuits.

Patent
01 Nov 1979
TL;DR: In this paper, a pattern-forming process using a radiation sensitive chalcogenide layer composed of a laminate of amorphous and thin silver layers was described, and the pattern was left on the substrate according to a given pattern by the above process.
Abstract: This invention relates to a pattern-forming process using a radiation sensitive chalcogenide layer composed of a laminate of amorphous chalcogenide layer (2) and thin silver layer (3), and discloses a pattern-forming process characterized by etching out an amorphous chalcogenide layer (22) not doped with silver at an unexposed area under an irradiation of a light (6) or an accelerated corpuscular beam by a plasma etching with a fluorine-series gas and also a pattern-forming process wherein silver-doped amorphous chalcogenide layer (21) left on the substrate according to a given pattern by the above process is used as an etching mask and then the substrate layer (1c) is etched out by a plasma etching to form the given pattern on the substrate.

Journal ArticleDOI
L. M. Ephrath1
TL;DR: The use of reactive ion etching is important in achieving these high etch ratios; the low operating pressure of between 2.7 and 5.3 Pa and the exposure of substrates to bombardment by energetic ions tend to inhibit polymerization on the substrates as discussed by the authors.
Abstract: Highly selective etching of silicon dioxide relative to both silicon and resist has been obtained by reactive ion etching substrates which are loaded onto an rf cathode and exposed to a low pressure discharge of a etching gas mixture. Silicon dioxide‐to‐silicon etch rate ratios as high as 35 to 1 have been measured and silicon dioxide‐to‐resist etch rate ratios have been found to exceed 10 to 1. The use of reactive ion etching is important in achieving these high etch ratios; the low operating pressure of between 2.7 and 5.3 Pa and the exposure of substrates to bombardment by energetic ions tend to inhibit polymerization on the substrates. As a result, it is possible to use the greater concentrations which are required for high etch rate ratios.

Journal ArticleDOI
J. W. Coburn1, Eric Kay1
TL;DR: In this paper, a low-pressure, long-residence-time system was used to demonstrate that the etching behavior of glow discharges is not significantly influenced by the molecular structure of injected gas molecules, but is determined primarily by the elemental composition of the glow discharge.
Abstract: Mass spectrometric sampling of fluorocarbon glow discharges and in situ measurements of the etch rate of Si and SiO2, with quartz crystal microbalances have been used to provide additional insight concerning the chemistry involved when additive gases such as O2, H2, N2, H2O, and C2F4 are injected into a CF4 glow discharge. The results obtained in our low-pressure, long-residence-time system indicate that the etching behavior of the discharge is not significantly influenced by the molecular structure of the injected gas molecules but is determined primarily by the elemental composition of the glow discharge. This phenomenologically observed result can be used to predict qualitatively the relative etching behavior of a large class of gaseous etchant mixtures as well as the role of various electrode or wall materials in the plasma etching process. Although this oversimplified interpretation should not be extended to short-residence-time plasma systems, it is believed to be valid for some of the configurations used in plasma etching and reactive ion etching.

Journal ArticleDOI
TL;DR: In this paper, a 2.6 μm-thick organic layer was used to generate steep profile patterns for photo and electron lithography, which reduced the need for thick resist patterns for the lithography step and ensured high resolution combined with good step coverage.
Abstract: High resolution and steep profile patterns have been generated in a 2.6 μm thick organic layer which conforms to the steps on a wafer surface and is planar on its top. This thick organic layer (a photoresist in the present experiments) is covered with an intermediate layer of SiO2 and a top, thin layer of x‐ray or photoresist. After exposure and development of the top resist layer, the intermediate layer is etched by CHF3 reactive ion etching. The thick organic layer is then etched by O2 reactive ion etching. Submicron resolution with essentially vertical walls in the thick organic material was achieved. The technique is also applicable to photo and electron lithography. It reduces the need for thick resist patterns for the lithography step and, at the same time, ensures high resolution combined with good step coverage.

Journal ArticleDOI
Warren DeSorbo1
TL;DR: In this article, the effects of ultraviolet exposure in air showing significant increases on track etching rates of irradiated polycarbonate film, first reported by Humphrey and Crawford, have been extended to include other environmental gases, namely oxygen, carbon dioxide and nitrogen in addition to air.

Journal ArticleDOI
TL;DR: In this article, the authors describe the variation in etch rate of silicon with rf power, frequency, reactant concentration, reactionant flow rate, gas presure, crystal orientation, and batch size.
Abstract: Reactive ion etching of silicon substrates in a plasma containing chlorinated species does not result in undercut of a permanent mask. When the silicon is very highly doped it behaves as a different material and undercut has been observed. This phenomenon will be discussed. For use in chlorinated plasmas, there is a choice of nonerodible masks that sputter slowly but will not be redeposited on the substrate surface. Both CCl4/Ar and Cl2/Ar plasmas will be described. The variation in etch rate of silicon with rf power, frequency, reactant concentration, reactant flow rate, gas presure, crystal orientation, and batch size will be presented. The possibilities of polymer formation and surface roughening will be discussed.

Journal ArticleDOI
TL;DR: In this paper, a review of the morphology changes of macroscopic unsupported metal catalysts in thermally etching and in reactive gases (catalytic etching) is presented, and a number of mechanisms which may be responsible for etching are summarized.

Patent
Kent N Maffitt1, Richard F. Willson1
10 Oct 1979
TL;DR: In this article, a method for producing a micro structure on the surface of an article is described, which consists of depositing a discontinuous coating of a material exhibiting a low rate of sputter etching on a substrate exhibiting a higher rate of spatiotemporal etching and differentially sputtering the composite surface to produce a topography of pyramid-like micropedestals random in height and separation.
Abstract: A method is disclosed for producing a micro structure on the surface of an article. The method comprises the steps of depositing a discontinuous coating of a material exhibiting a low rate of sputter etching on a substrate exhibiting a higher rate of sputter etching and differentially sputter etching the composite surface to produce a topography of pyramid-like micropedestals random in height and separation. The articles produced by this method are characterized by both the microstructured surface and by the detectable presence of the material exhibiting the lower rate of sputter etching. The microstructured surface results in the articles having uniform antireflecting properties over a large range of angles of incident light and over an extremely broad range of wavelengths, in which the antireflecting characteristic is obtained without an attendant increase in diffuse scattering. Also, the microstructured surface results in the articles being characterized by a high degree of adherence, such that the treated surface may be considered to be "primed", thereby enabling the application of highly adherent coatings or layers thereon.

Journal ArticleDOI
TL;DR: In this paper, the development of track images in CR-39 by the electrochemical etching (ECE) technique was reported, and the optimum conditions of the applied electrical field and frequency as well as of etching and pre-etching were reported for the plastic.

Patent
09 Oct 1979
TL;DR: In this paper, the authors proposed a structure for improving the cooling characteristics of a silicon semiconductor device immersed in a fluid coolant by forming lattice defects on the backside surface of the device by sandblasting and subsequently etching the damaged surface.
Abstract: The invention is a structure for improving the cooling characteristics of a silicon semiconductor device immersed in a fluid coolant The cooling improvement is achieved by enhancing the nucleate boiling characteristics of the silicon device by initially forming lattice defects on the backside surface of the device by sandblasting and subsequently etching the damaged surface to remove the lattice defects and thereby produce an intricate surface morphology which provides nucleate boiling sites

Patent
17 Oct 1979
TL;DR: In this article, the authors used a curved electrode which is closer to the slice at the center than at the periphery to improve radio frequency plasma etching of conductive coatings on semiconductor slices.
Abstract: Radio frequency plasma etching of conductive coatings on semiconductor slices is improved by the use of a curved electrode which is closer to the slice at the center than at the periphery. Preferably, the electrode is in a symmetrical chamber which contains only one slice, and reactant gases are admitted through apertures in the electrode. An r.f. power source is connected between the electrode and a holder for the slice.

Patent
28 Jun 1979
TL;DR: In this paper, a semi-conductor substrate is selectively etched to produce a spaced succession of narrow, shallow trenches separated by narrow silicon mesas, and the remaining trench volume is filled in with chemical-vapor-deposited silicon dioxide.
Abstract: A method for making wide, deep recessed oxide isolation trenches in silicon semiconductor substrates. A semi-conductor substrate is selectively etched to produce a spaced succession of narrow, shallow trenches separated by narrow silicon mesas. Silicon oxide is chemical-vapor-deposited on the horizontal and vertical surfaces of the etched structure to a thickness equalling the width of a desired silicon oxide mask. The mask is used for etching multiple deep trenches in the substrate, the trenches being separated by thin walls of silicon. The thickness of the walls is uniformly equal to and determined by the thickness of the deposited silicon oxide mask. The deposited silicon oxide is reactively ion etched away from the horizontal surfaces, leaving the oxide only on the sidewalls of the shallow trenches. The silicon is deeply etched, using the remaining oxide as a mask. Boron is ion implanted and the resulting structure is thermally oxidized sufficiently to completely oxidize the silicon under the deposited oxide mask and to oxidize the silicon surfaces at the bottoms of the trenches. The remaining trench volume is filled in with chemical-vapor-deposited silicon dioxide.

Patent
26 Jan 1979
TL;DR: In this paper, a method and apparatus for controlling plasma etching processes in which a thin layer is etched away to expose a substrate is described, where coherent light is directed onto the surface being etched, so that the change in reflectivity of the surface upon exposure of the underlying substrate produces a detectable change in the characteristics of the light reflected.
Abstract: A method and apparatus are disclosed for controlling plasma etching processes in which a thin layer is etched away to expose a substrate. Coherent light is directed onto the surface being etched, so that the change in reflectivity of the surface upon exposure of the underlying substrate produces a detectable change in the characteristics of the light reflected. A derivative detector having a variable timer is provided to sample continuously the reflected light and provide a control signal in response to a predetermined change in the characteristics of the light reflected, which is used to terminate the plasma etch process before an overetch condition occurs. The method and apparatus of the invention will detect a desired end point of etching through insulation to an underlying metal substrate, through metal to an underlying insulation substrate, through one insulation type to an underlying substrate of another insulation type and through one metal to an underlying substrate of another metal.

Journal ArticleDOI
TL;DR: In this paper, a two-level scheme was proposed to obtain steep profile, thick resist, and high resolution patterns over stepped and/or reflecting surfaces, where negative photosensitive inorganic resist Ag2Se/GeSe is formed on top of a thick polymer layer.
Abstract: We have investigated the feasibility of a two‐level scheme to obtain steep profile, thick resist, and high resolution patterns over stepped and/or reflecting surfaces. The two‐level scheme provides an alternative to a recently developed three‐level approach. The negative photosensitive inorganic resist Ag2Se/GeSe is formed on top of a thick polymer layer, which is not photo‐sensitive. High resolution patterns are produced in a 0.3 μm thick, pinhole‐free, inorganic resist layer using a commercial projection printer. The pattern is transferred to the polymer layer by oxygen reactive ion etching using the inorganic resist pattern as the mask against etching. Vertical‐walled 0.8 μm lines and spaces are obtained in a 2.5‐μm‐thick polymer. The high absorbance of light by the Se–Ge layer (2.5×105cm−1 at 400 nm) eliminates standing wave effects associated with reflection from the surface.

Patent
17 Jul 1979
TL;DR: In this article, a diffraction grating made of a single crystalline silicon substrate is provided with a plurality of asymmetric triangular grooves, each having a wall inclined by an angle with respect to the major surface so as to satisfy an equation θ=sin-1 mλB /2P where θ represents the blaze angle, P the pitch of the groove, λB the blazing wavelength, and m the order of diffraction.
Abstract: In a diffraction grating made of a single crystalline silicon substrate, one major plane thereof is provided with a plurality of asymmetric triangular grooves, each having a wall inclined by an angle θ with respect to the major surface so as to satisfy an equation θ=sin-1 mλB /2P where θ represents the blaze angle, P the pitch of the groove, λB the blazing wavelength, and m the order of diffraction. The walls of each groove receiving incident light is covered with a metal coat. The diffraction grating is prepared by using a {hkl} plane (where h=k) inclined by θ with respect to the {111} plane of the single crystalline silicon as a major surface, and then anisotropic-etching the major surface through an etching mask having stripes having sufficiently smaller width than the grating constant. Preferably, following the anisotropic etching, isotropic etching is made for the major surface.

Patent
04 Apr 1979
TL;DR: In this article, a semiconductor pressure transducer assembly consisting of a silicon diaphragm assembly and a glass covering member is presented. But the assembly is not shown in detail.
Abstract: A semiconductor pressure transducer assembly comprising a silicon diaphragm assembly and a glass covering member. The silicon diaphragm assembly has a circular diaphragm portion of thin silicon which is formed using etching, and a thick supporting portion therearound. Piezoresistive elements of a piezoresistive bridge circuit and conducting paths for electrically connection thereof are formed on the silicon diaphragm assembly. On a surface of the silicon diaphragm assembly, a passivating layer of silicon dioxide are formed in uniform thickness, and further on a surface of the passivating layer is formed a layer of polysilicon on the supporting portion of the silicon diaphragm assembly. In the passivating layer, a contacting window is formed, through which the polysilicon layer is electrically connected to the silicon diaphragm assembly. The covering member of borosilicate glass having a circular well is mounted and bonded onto the silicon diaphragm assembly in contact with the polysilicon layer using Anodic Bonding method. And the processed silicon diaphragm assembly has a flat surface thereof, on which the piezoresistive elements and the conducting paths are constructed using Ion Implantation method, or reforming a silicon dioxide layer thereon after removing another silicon dioxide layer used as mask in diffusing process.

Journal ArticleDOI
R.A. Gdula1
TL;DR: In this paper, the general interaction of radiation with thermally grown SiO 2, both phenomenologically and atomistically, is discussed, and the effect of these processes on the oxidized silicon system is treated, and process modification to minimize radiation damage is discussed.
Abstract: This paper briefly reviews the general interaction of radiation with thermally grown SiO 2 , both phenomenologically and atomistically. Radiation-induced trapped charge, the creation of fast surface states, and the all-important neutral electron traps are discussed. The types of radiation and their concomitant damage produced by the typical processes of ion implantation, reactive ion etching, and electron-beam lithography are outlined. The effect of these processes on the oxidized silicon system is treated, and process modification to minimize radiation damage is discussed.

Patent
28 Jun 1979
TL;DR: In this paper, a self-aligned MOS transistor is constructed using undercut etching of a polycrystalline silicon gate electrode, which allows the source and drain regions to be selfaligned with and closely spaced to the gate electrode.
Abstract: A self-aligned MOS transistor having improved operating characteristics and higher packing density and a method for fabricating the device. Resistance of the gate electrode is reduced substantially by forming the electrode of a metal silicide. Resistance of the source and drain regions is likewise reduced substantially by forming a metal silicide in the doped junction region which allows those regions to be smaller and to require less area. The silicided source and drain regions are self-aligned with and closely spaced to the silicided gate electrode. This is provided by a process which utilizes and makes possible an undercut etching of a polycrystalline silicon gate electrode.

Journal ArticleDOI
T.I. Chappell1
TL;DR: The V-Groove multijunction (VGMJ) solar cell as discussed by the authors is an array of many individual diode elements connected in series to produce a highvoltage low-current output.
Abstract: A new type of silicon photovoltaic converter has been developed called the V-Groove Multijunction (VGMJ) solar cell. The VGMJ solar cell consists of an array of many individual diode elements connected in series to produce a high-voltage low-current output. All the elements of the cell are formed simultaneously from a single silicon wafer by V-groove etching. The results of detailed computer simulations predict a conversion efficiency in excess of 24 percent for this cell when it is operated in sunlight concentrated 100 or more times. The advantages of this cell over other silicon cells include the capability for greater than 20-percent conversion efficiency with only modest bulk carrier lifetimes, a higher open-circuit voltage, a very low series resistance, a simple one-mask fabrication procedure, and excellent environmental protection provided by a glass front surface.