Showing papers on "Fast packet switching published in 1996"

A channel access scheme for large dense packet radio networks

Abstract: Prior work in the field of packet radio networks has often assumed a simple success-if-exclusive model of successful reception. This simple model is insufficient to model interference in large dense packet radio networks accurately. In this paper we present a model that more closely approximates communication theory and the underlying physics of radio communication. Using this model we present a decentralized channel access scheme for scalable packet radio networks that is free of packet loss due to collisions and that at each hop requires no per-packet transmissions other than the single transmission used to convey the packet to the next-hop station. We also show that with a modest fraction of the radio spectrum, pessimistic assumptions about propagation resulting in maximum-possible self-interference, and an optimistic view of future signal processing capabilities that a self-organizing packet radio network may scale to millions of stations within a metro area with raw per-station rates in the hundreds of megabits per second.

Trading packet headers for packet processing

Abstract: In high speed networks, packet processing is relatively expensive while bandwidth is cheap. Thus, it pays to add information to packet headers to make packet processing easier. While this is an old idea, we describe several specific new mechanisms based on this principle. We describe a new technique, source hashing, which can provide O(1) lookup costs at the data link, routing, and transport layers. Source hashing is especially powerful when combined with the old idea of a flow identifier (flow ID); the flow ID allows packet processing information to be cached and source hashing allows efficient cache lookups. Unlike virtual circuit identifiers (VCIs), source hashing does not require a round-trip delay for set up. In an experiment with the BSD packet filter implementation, we found that adding a flow ID and a source hash improved packet processing costs by a factor of seven. We also found a 45% improvement when we conducted a similar experiment with IP packet forwarding. We also describe two other new techniques: threaded indices, which allows fast VCI-like lookups for datagram protocols like IP; and a data manipulation layer (DML), which compiles out all the information needed for integrated layer processing (ILP) and scheduling into an easily accessible portion of each packet.

Adaptive error control for packet video in the Internet

Abstract: Anecdotal evidence suggests that the quality of many videoconferences in the Internet is mediocre because of high packet loss rates. This makes it important to design and implement mechanisms that minimize packet loss and its impact in video (and audio) applications. There are two such types of mechanisms. Rate control mechanisms attempt to minimize the amount of packet loss by matching the bandwidth requirements of a video flow to the capacity available in the network. However, they do not prevent packet loss altogether. Error control mechanisms attempt to minimize the visual impact of lost packets at the destinations. We provide motivation for using error control mechanisms based on forward error correction (FEC) and packet reconstruction. We examine a specific mechanism, and evaluate its cost as well as the benefit expected from using it. This mechanism can be augmented to obtain a joint source/channel coding scheme suitable for both the current and the future integrated services Internet.

High speed, high capacity ATM optical switches for future telecommunication transport networks

Abstract: This paper describes the work carried out in the RACE Project R2039 ATMOS (asynchronous transfer mode optical switching). The project is briefly illustrated, together with its main goal: to develop and assess concepts and technology suitable for optical fast packet switching. The project's technical approach consisted in the exploitation of the space and wavelength domains for fast routing and buffering: The major achievements are then reported. Four different switch architecture concepts have been proposed, investigated and developed, all based on a high speed optical routing matrix electrically controlled at lower speed. The basic optical key components and subsystems (wavelength converters, space switches and optical buffers) are described in detail, with the outstanding results obtained and the corresponding projected performance. In particular, system demonstration of wavelength conversion at 10 and 20 Gb/s has been realized, to show the usefulness of the ATMOS technology both to implement optimized high performance optical packet-switching fabrics as well as transparent optical circuit-routing nodes. Four rack-mounted, reduced size demonstrators of basic switching matrices have been designed and implemented scalable to real system sizes. The obtained good results in terms of bit error rate and hardware integration are reported, showing that ATM switches are feasible with state of-the-art optical technology.

Packet transmission node device realizing packet transfer scheme and control information transfer scheme using multiple virtual connections

Abstract: A packet transmission node which realizes a packet transfer scheme in which a plurality of virtual connections for different qualities of service are set up in correspondence to a multicast destination address, and output virtual connection identifiers are stored in correspondence to destination addresses in a routing table, so that a packet is transferred to output virtual connections determined by referring to the routing table according to a destination address of a packet. A packet transmission node also realizes a control information transfer scheme in which different output virtual connections are set up for a user data packet and a control packet having an identical destination address, and output virtual connection identifiers are stored in correspondence to destination addresses and upper layer protocol identifiers in a routing table, so that a packet is transferred to an output virtual connection determined by referring to the routing table according to a destination address and an upper layer protocol identifier of a packet.

Throughput analysis of DS/SSMA unslotted ALOHA system with fixed packet length

Abstract: Throughput analysis of direct-sequence spread spectrum multiple access (DS/SSMA) unslotted ALOHA with fixed packet length is presented. As the levels of multi-user interference fluctuate during the packet transmission, we calculate the packet error probability and the throughput by considering not only the number of overlapped packets but also the amount of time overlap. On the assumption that packet generation is Poisson, the system can be thought as the queueing system M/D//spl infin/. With Gaussian approximation of multi-user interference, we obtain the throughput as the function of the number of chips in a bit, the packet length, and the offered load of the system. We also analyze the channel load sensing protocol (CLSP), and obtain the optimum threshold of CLSP.

Distributed packet switching in arbitrary networks

Abstract: In a seminal paper Leighton, Maggs, and Rao consider the packet scheduling problem when a single packet has to traverse each path. They show that there exists a schedule where each packetreaches its destination in O(C + D) steps, where C’ is the congestion and D is the dilation. The proof relies on the Lovbz Local Lemma, and hence is not algorithmic. In a followup paper Leighton and Maggs use an algorithmic version of the Local Lemma due to Beck to give centralized algorithms for the problem. Leighton, Maggs, and Rao also give a distributed randomized algorithm where all packets reach their destinations with high probability in O(C’ + D log n) steps. In this paper we develop techniques to guarantee the high probability of dehvering packets without resorting to the Lovi$sz Local Lemma. We improve the distributed algorithm for problems with relatively high dilation to O(C) + (log* n)”(iog” ‘JD -t poly(log n). We extend the techniques to handle the case of infinite streams of regularly scheduled packets along every path. Here we measure the congestion on an edge e by the sum of the rates of the packet streams that use the edge, denoted by A(e). We require that for some small constant e > 0, for every edge e, J(e) S 1 – c. In this case we use the parameter R = mw ri, the maximum distance between packets of the same stream, instead of the congestion C above. We notice that max{R, D} is a worst case lower bound on the maximum delay of a packet. We also extend the results to a model of packet traf*Supported in part by the NSF PYI award of $va Tardos. Part of this work was performed while visiting the School of OR&IE at Cornell, and while a postdoctoral fellow at the University of Toronto Computer Science Department. Work at the Technion supported in part by the Ruth and David Moskowitz Academic Lectureship award. t Research supported in part by a Packard Fellowship and ZUI NSF PYI award, by NSF through grant DMS 9505155, and ONR through grant NOO014-961-0050. Permission to make digitel/bard copies of all or pad of this material for personal or classroom use is granted without fee provided that the copies are not made or distributed for profit or conunereial advantage, the copyright notice, the title of the publication and its date appear, and notice is given that copyright is by permission of tie ACM, Inc. To c~y otherwise, to republish, to peat on servers or to redlatribute to lists, requmes specific permission and/or fee. STOC’96, Philadelphia PA, USA @ 1996 ACM 0-89791-785.5/96/05. .$3.50 fic for handling bursty communication. The model is motivated by the new adversarial model suggested by Borodin et al.

Adaptive methods for packet transmission over wireless networks

Abstract: A method for transmission of digital information packets over a transmission channel. A transmitter computes a current value of a carrier-sense defer threshold and a transmit power level, based an observed ratios between recent packet transmission successes, recent packet collisions, recent packet deferrals, and an estimate of a path-loss characteristic of the transmission channel. The computed power level and carrier-sense defer threshold are selected to obtain a desired ratio of at least two of future packet success, future packet collisions, or future packet deferrals. The current carrier-sense defer threshold value is used to determine when a carrier signal for another transmitter's digital information packet is present on the transmission channel; transmission is deferred until the channel is determined to be clear of other packets. The packet is then transmitted at the computed power level.

Maintaining high throughput during overload in ATM switches

Abstract: This paper analyzes two popular heuristics for ensuring packet integrity in ATM switching systems. In particular, we analyze the behavior of packet tail discarding, in order to understand how the packet level link efficiency is dependent on the rates of individual virtual circuits and the degree of the imposed overload. In addition, we study early packet discard and show that the queue capacity needed to achieve high efficiency under worst-case conditions grows with the number of virtual circuits and we determine the efficiency obtainable with more limited queue capacities. Using the insights from these analyses, extensions to early packet discard are proposed which achieve high efficiency with dramatically smaller queue capacities (independent of the number of virtual circuits).

Method and system for increasing network information carried in a data packet via packet tagging

Abstract: A method and system for providing statistical network information carried in a data packet (8) being transmitted on a network. The method includes the steps of receiving a data packet having a data portion on a repeater (12) and transferring the data portion to a management unit (10). The method further includes the step of appending statistical information to the data portion during an inter-packet gap period. The apparatus for increasing information in a data packet on a network includes a repeater mechanism, a management unit mechanism, and a packet tagging circuit. The repeater mechanism receives a data packet having a data portion, the management unit mechanism determines statistical information based on the data packet, and the packet tagging circuit appends information to the data portion of the data packet during an inter-packet gap period.

Throughput performance of SAW-ARQ protocol with adaptive packet length in mobile packet data transmission

Abstract: In a noncellular or large cell-size mobile radio communication system, log-normal shadowing as well as Rayleigh fading becomes the predominant source of system degradation. This paper proposes an efficient stop and wait automatic repeat request (SAW-ARQ) protocol with adaptive packet length to provide reliable mobile data packet transmission. The adaptive SAW-ARQ protocol controls the transmitting packet length according to the time-varying channel condition estimated with the number of ACK (acknowledgment packet) and NACK (negative-acknowledgment packet). Computer simulation results show that the proposed protocol can achieve high throughput and reduce the number of retransmission effectively for slow and fast Rayleigh fading/log-normal shadowing conditions.

Cable modem interface unit for capturing and processing incoming packets from a cable modem

Abstract: A cable modem interface unit is positioned between a cable modem and a network driver interface layer. The cable modem receives packets from a packet source. The interface unit includes a control packet filter coupled to the modem. The control packet filter receives a packet from the cable modem and determines whether the packet is a control packet or a data packet. The interface unit further includes a receive unit coupled to the control packet and the network driver interface layer. If the control packet filter determines that the packet is a data packet, the receive unit receives the packet from the control packet filter and sends the packet to the network driver interface layer. The interface unit further includes a protocol handler coupled to the receive unit. If the control packet filter determines that the packet is a control packet, the protocol handler receives the packet from the control packet filter.

A new error concealment technique for audio transmission with packet loss

Abstract: We present a new error concealment technique for audio transmission over packet networks with high packet loss rate. Unlike other techniques it modifies the time-scale of correctly received packets instead of repeating them. This is done by a time-domain algorithm, WSOLA, whose parameters are redefined so that short audio segments like lost packets can be extended. Particular attention is paid to the additional delay introduced by the new technique. For subjective hearing tests, single and double packet loss is simulated at high packet loss rates, and the new technique is compared to previous proposals by category judgment and component judgment of sound quality. Mean Opinion Score (MOS) curves show that sound distortions due to packet repetition can be reduced.

Network node for packet switching with selective data processing and method therefor

Abstract: A packet switching communication network (10) includes a number of switching nodes (16). The switching nodes include a switch (18) and at least one data processor (20). When selected packets (34), as identified by routing codes (40), arrive at one of the switching nodes (16), they are passed (58) to the data processor (20). The data processor (20) is configured to perform a network processing function, such as packet broadcasting (74) or error correction (60). In performing these functions, user data (38) conveyed by the selected packets (34) are processed to generate processed packets. The processed packets are re-introduced to the switch (18) and routed onto their destinations.

A terabit per second packet switch having assignable multiple packet loss probabilities

Abstract: A physically realizable one terabit or more ATM packet switch that has a large number of input interfaces connected to a single stage switching fabric which is in turn connected to a number of output modules, generally according to the growable packet switch architecture. This ATM packet switch is different from other growable packet switches in that it has a single stage switch fabric controlled by an out-of-band controller, yet it has significantly reduced complexity with respect to comparably sized electronic crossbar switches or their isomorphs. The out-of-band controller has multiple priority levels in order to provide high priority users with a near certainty that their packets will be successfully routed, while delivering an acceptably low packet or cell loss probability to users at the lowest priority level.

Method and apparatus for detection of packet types in a communications network

Abstract: Detection of the packet type of information packets received at a node in a packet based communications network is accomplished by comparing information from each received packet to a table (62) of possible packet types. After packet type has been identified, the corresponding packet is routed for processing based on type. For increased processing speed, the comparison with each of the entries in the table (62) can be performed substantially simultaneously. In one embodiment, a content addressable memory (CAM, 48) is utilized to store the table (62) information and to perform the required comparisons. In addition, wired OR means (50) is provided for use in reducing the total number of entries in the table (62). In a preferred embodiment, the cell types of asynchronous transfer mode (ATM) cells are detected.

Terabit per second ATM packet switch having out-of-band control with multicasting

Abstract: An out-of-band controller for a large packet switch which is distributed throughout partitions or pipes of the packet switch. Thus, the out-of-band controller is divided into multiple pipe controllers. These pipe controllers are connected and operated in a ring such that each pipe controller is with a respective fraction of the input path requests for packets. The requests are processed concurrently and any request that is not fulfilled in one pipe controller is offered to up to three subsequent pipe controllers to hunt a path for the awaiting packets. The controller, by using up to four levels of parallelism, can hunt paths and set up connections for 256 or more input ATM packet lines in normal monocast mode, thus providing a throughput of 1 terabit per second or more. A distributed controller design makes such tremendous aggregate switching speeds possible. The same general distributed controller design can also provide pipe hunting for a special packet operation called multicasting, in which one packet from one input line is transmitted to many or even all output lines. As can be appreciated, multicasting can monopolize system assets to the detriment of other ATM packets, so some multicasting may be made during special packet cycles when primarily multicasting packets will be carried. One such special packet cycle might occur at system initialization.

Communications unit and method of communicating having efficient packet acknowledgement

Abstract: A communications unit (10) with a packet subdivider operable on a data packet (200) and an error detecting code generator. An acknowledgement message (NAK) is generated including error detecting code corresponding to packet portions (210-204) from the packet subdivider, thereby requesting retransmission of packet portions. At an originating unit (100) an error detection code is computed for each portion. The computed second error detection code for each sub-portion is compared with the received first error detection code for that portion. Portions for which corresponding error detection codes do not match are identified as bad portions and are retransmitted (220).

Packet transfer method, packet processor, packet ciphering method, packet decoding method and packet ciphering processing method

Abstract: PROBLEM TO BE SOLVED: To confirm the adequacy of each packet in each packet processing unit by conducting verification processing among packet processing units each managing a transmission source computer and a destination computer. SOLUTION: Computers H3, H4 are directly contained respectively in management networks A1, A in the computer network. A packet passes security gateway GA while it is reached finally to a destination host from a source host. Each GA executes packet verification processing in the case of transmission of a packet externally or reception of the packet, and a verification key is provided link by ink in a form along with a passing path among the GAs. A GA in existence in a packet path transfers packets to its adjacent GA while repeating code resetting due to check/generation of a packet verification code.

Analysis and implementation of hybrid switching

Abstract: The switching scheme of a point-to-point network determines how packets flow through each node, and is a primary element in determining the network's performance. In this paper, we present and evaluate a new switching scheme called hybrid switching. Hybrid switching dynamically combines both virtual cut-through and wormhole switching to provide higher achievable throughput than wormhole alone, while significantly reducing the buffer space required at intermediate nodes when compared to virtual cut-through. This scheme is motivated by a comparison of virtual cut-through and wormhole switching through cycle-level simulations, and then evaluated using the same methods. To show the feasibility of hybrid switching, as well as to provide a common base for simulating and implementing a variety of routing and switching schemes, we have designed SPIDER, a communication adapter built around a custom ASIC called the programmable routing controller (PRC).

Personal communication apparatus with call switching modem and packet switching modem

Abstract: A personal communication apparatus is disclosed, which comprises a radio transmitter 64 and a radio receiver 66 for participating in communication, a microphone 60, a loudspeaker 61, a processor 90 as a controller for controlling call switching communication and packet switching communication, a ROM 100 and a RAM 101 for storing control programs and data, a call switching modem 80 for modulating signal in the speech frequency band, and a packet switching modem 82 for modulating signal in a frequency band exceeding the speech frequency band. The outputs of the microphone 60 and call switching modem 80 are bandwidth limited by a transmission signal processing circuit 72. Communication by the packet switching modem is carried out according to a communication program. The apparatus is capable of stand alone call switching communication and also of packet switching communication, as well as functioning as a radio telephone set.

Mobile packet data communications system

Abstract: Packet data is routed from a packet data network (18) to a mobile subscriber (10) served by a base station (12) and a base station controller (13) by encapsulating the packet and providing the encapsulated packet with temporary address information for transport of the packet to the mobile subscriber (10) via the base station controller (13).

System for performing deadlock free message transfer in cyclic multi-hop digital computer network using a number of buffers based on predetermined diameter

Abstract: In brief summary, the invention provides a new message packet transfer system, which may be used in, for example, a multiprocessor computer system. The message packet transfer system comprises a plurality of switching nodes interconnected by communication links to define at least one cyclical packet transfer path having a predetermined diameter. The switching nodes may be connected to, for example, digital data processors and memory to form processing nodes in an multiprocessor computer system, and/or to other sources and destinations for digital data contained in the message packets. The switching nodes transfer message packets each from a respective one of the switching nodes as a respective source switching node to a respective one of the switching nodes as a respective destination switching node. At least one of the switching nodes has a plurality of buffers for buffering a corresponding plurality of message packets that it (that is, the at least one of the switching nodes) receives from another of said switching nodes during a message transfer operation, which ensures that deadlock does not occur during the message transfer operation.

ATM controller and ATM communication control device

Abstract: There is provided an ATM controller which can support setting or alteration of protocol processing, and more greatly reduce the load (overhead) of software processing. The ATM controller performs the processing of an ATM layer and an AAL layer between a terminal and an ATM network, and comprises cell transmit control moans for transferring a packet from a terminal side to an ATM network side while segmenting the packet into data cells, cell reception control means for reassembling data cells received from the ATM network side into a packet and transferring the packet to the terminal side, a rewritable memory for storing a firmware, and a microprocessor for performing a cell analysis and the processing corresponding to the analysis result.

Packet data communication method and system

Abstract: A data transmission system (5) transmits data between a transmitter (10) and a receiver (20). Each data packet frame (130) is made up of three parts: a header (131), a packet identifier number (132), and subframes of data (133). Error codes are generated corresponding to each subframe of data (133). The transmitter (10) will then check the error code to determine which subframes of data (133) contain an error. If there are errors in the data packet (130), then the receiver (20) stores the error-free subframes in memory and does not send an acknowledgment packet (140). The master (10) will retransmit the same data packet until it receives an acknowledgment packet (140).

Redundant ATM interconnect mechanism

Abstract: An improvement to conventional ATM network paradigms involves the distribution of ATM switching functions across a large number of ATM switching units, each of which may typically provide a limited number of available ports, and by establishing multiple connections between the larger number of ATM switching units in a partially redundant "chained" configuration analogous to various ring type topologies. A plurality of "XNODES" each comprising a packet segmentation/reassembly circuit and an ATM switching circuit may be interconnected in various ways to form redundant ATM paths without the need to replicate large and expensive ATM switches.

Distributed queue packet scheduling algorithms for WDM-based networks

Abstract: Two protocols for scheduling variable-length packet transmissions in an optical passive star network using wavelength division multiplexing (WDM) are specified and analyzed. These protocols require: a separate channel for transmission of control packets, a fixed transmitter and receiver and a tunable transmitter and receiver. The distinction between these protocols and other WDM protocols is that message transmissions are initiated by the receipt of a control message; other schemes schedule packet transmission for some fixed point in the future. This flexibility allows these protocols to avoid "head-of-line" blocking which is a problem encountered in some other protocols. The protocols presented place no constraints on the size of a message, the size of a packet or on the number of available data channels; maintain a distributed queue for each of the output nodes; and guarantee that there are no receiver or data channel collisions. The delay characteristics of these protocols are analyzed and compared to those of the TTAS algorithm.

Marking mechanism for controlling consecutive packet loss in ATM networks

Abstract: An apparatus and method for optimal packet marking to control consecutive packet loss (also called "average packet gap") in a packet buffer. The apparatus and method can be used in a packet switched system having either a single or multiple packet class, as well as at any entry point of the packet switched system, e.g. source buffers, and switching node buffers. It is shown that variations of the disclosed packet marking method are optimal for either minimizing or maximizing the average packet gap.

Asynchronous transfer mode packet conversion to one of plural formats

Abstract: An asynchronous transfer mode (ATM) network control apparatus receives data, converts the data into an ATM packet, stores a table of header information for at least one communication network, changes the header of the received ATM packet on the basis of information in the ATM packet header and the stored table, and outputs the modified ATM packet. Units which perform these functions are connected to a general purpose bus line and a high-speed bus line.