Showing papers on "FET amplifier published in 2004"

High efficiency amplifier and method of designing same

Abstract: An amplifier includes a main amplifier circuit and at least one auxiliary amplifier circuit. Portions of an RF signal to be amplified are delivered to the main and auxiliary amplifiers. The auxiliary amplifier circuit is selectively operable to operate in combination with the main amplifier circuit, such as based on the level of the RF signal. At least one hybrid coupler circuit has input ports coupled with outputs of the main amplifier circuit and auxiliary amplifier circuit. The hybrid coupler circuit is operable to combine amplifier circuit output signals at a coupler first output port. A coupler second output port is terminated with one of an electrical short and an electrical open circuit.

High frequency power amplifier and wireless communication module

Abstract: The present invention provides a high frequency power amplifier of an open-loop type, which outputs a signal having a level corresponding to an output level required under control of a power supply voltage for each output power FET, based on a control signal for the output level. The high frequency power amplifier is provided with a bias voltage generating circuit which generates a gate bias voltage of each output power FET according to an output voltage of a power control circuit for controlling the power supply voltage for the output power FET, based on the control signal for the output level.

Stacked rf power amplifier

Abstract: A method and apparatus provides techniques for electrically isolating switching devices in a stacked RF power amplifier, which prevents the switching devices from being subjected to high breakdown voltages. The isolation provided allows the power amplifier to be implemented on an integrated circuit.

Method and apparatus providing integrated load matching using adaptive power amplifier compensation

Abstract: An RF power amplifier module can be used without a matching device between the power amplifier module and an antenna. The power amplifier module is constructed and operated to detect, protect and maintain the performance of the power amplifier in the presence of severe VSWR load mismatches, without requiring the use of external circuitry. The RF power amplifier module includes integral detection circuitry for generating a first detection signal having a value that is indicative of the current flowing through an output power transistor and a second detection signal having a value that is indicative the voltage appearing at the output of the output power transistor, as well as integral compensation circuitry for controlling the generation of a plurality of bias current and bias voltage signals to have values that are a function of the values of the first and second detection signals, as well as the current output power level of the RF power amplifier module. Also included is an integral impedance matching circuit, coupled between the output of the output transistor and the output node,. that provides a variable impedance that is selectively controlled by an output signal from the compensation circuitry.

N-way rf power amplifier circuit with increased back-off capability and power added efficiency using selected phase lengths and output impedances

Abstract: An RF power amplifier circuit for amplifying an RF signal over a broad range of power with improved efficiency includes a carrier amplifier for amplifying an RF signal over a first range of power and with a power saturation level below the maximum of the broad range of power is disclosed. A plurality of peak amplifiers are connected in parallel with the carrier amplifier with each of the peak amplifiers being biased to sequentially provide an amplified output signal after the carrier amplifier approaches saturation. The input signal is applied through a signal splitter to the carrier amplifier and the plurality of peak amplifiers, and an output for receiving amplified output signals from the carrier amplifier and the plurality of peak amplifiers includes a resistive load R/2. The split input signal is applied through a 90° transformer to the carrier amplifier, and the outputs of the peak amplifiers are applied through 90° transformers to a output load. When operating below saturation, the carrier amplifier delivers power to a load of 2R and the carrier amplifier delivers current to the load, which is one-half the current at maximum power when the amplifier is saturated. In one embodiment with the output having an impedance, Z, the carrier amplifier and each peak amplifier is connected to the output through an output-matching network presenting an output impedance of less than Z to each amplifier and with each output-matching network having selected phase length to reduce reactance of the output impedance.

Load variation tolerant radio frequency (RF) amplifier

Abstract: A power amplifier having a phase shift and impedance transformation element is disclosed. The power amplifier comprises a plurality of amplification paths, a first phase shift element at an input of each amplification path and a second phase shift element at an output of each amplification path. The amplifier also comprises an impedance transformation element associated with the second phase shift element and a power combiner configured to combine an output of each amplification path into a single output.

A high efficiency Chireix out-phasing power amplifier for 5GHz WLAN applications

Abstract: This paper describes the design methodology and presents measured results for a 5GHz Chireix out-phasing power amplifier. The outputs of two high efficiency amplifiers operating in class F are combined using a lossless combiner. A novel implementation of the class F output tuning networks and combiner using bond wires is also described. To our knowledge, this is the most efficient 802.11a amplifier ever reported.

SOI sense amplifier with cross-coupled body terminal

Abstract: Systems and methods for increasing the amount of current that can flow through the data line pull-down transistors in a sense amplifier by tying the bodies of these transistors to a voltage other than ground. In one embodiment, the bodies of the data line pull-down transistors in a sense amplifier are tied to the intermediate nodes on the opposing side of the sense amplifier to increase the current flow through the data line pull-down transistors, and also to reduce the voltage at the intermediate node that will be pulled low by the action of the bit line transistors. In one embodiment, the sense amplifier also includes pre-charge circuits which pre-charge the intermediate nodes to a predetermined voltage that is not reduced by the threshold voltage of the pull-down transistors.

An over 200-W output power GaN HEMT push-pull amplifier with high reliability

Abstract: We describe a state-of-the-art 250-W output power AlGaN/GaN HEMT push-pull transmitter amplifier operated at a drain bias voltage of 50 V. We also demonstrated stable operation under RF stress testing for 1000 h at a drain bias voltage of 60 V, for the first time. The amplifier, combined with a digital pre-distortion (DPD) system, also achieved an adjacent channel leakage power ratio (ACLR) of less than -50 dBc for 1-carrier W-CDMA signals with a drain supply voltage of 50 V. We show, for the first time, that an AlGaN/GaN HEMTs push-pull amplifier can fulfill the requirements of W-CDMA systems.

Amplifier system and method

Abstract: An embodiment of the present invention provides an amplifier system, comprising at least one variable impedance matching network, the output of which provides the input to at least one amplifier stage or provides an output of the power amplifier itself, and a bias network associated with the at least one amplifier stage. The amplifier system may further comprise a controller enabling impedance control to the at least one variable impedance matching network and a supply voltage provided to the at least one variable impedance network and/or the at least one amplifier stage and wherein the at least one variable impedance network and the at least one amplifier stage may be a plurality of impedance networks connected to a plurality of amplifier stages. The at least one variable impedance network may include at least one variable capacitor and the at least one variable capacitor may be a voltage tunable dielectric capacitor which may include Parascan® voltage tunable dielectric material.

Rf amplifier employing active load linearization

Abstract: A method and apparatus for linear amplification of a modulated carrier signal or multi-carrier signal is disclosed. The linearity of the amplifier is improved by employing dynamic load line adjustments. A second current source coupled to the amplifier output load is turned on just before the amplifier reaches a nonlinear regime and reduces the effective load to prevent the amplifier allowing sufficient power to reach the nonlinear regime near saturation. The technique is particularly advantageous for amplification of a signal with large peak to average ratio.

High frequency power amplifier circuit and electronic component for high frequency power amplifier

Abstract: In a high frequency power amplifier circuit that supplies a bias to an amplifying FET by a current mirror method, scattering of a threshold voltage Vth due to the scattering of the channel impurity concentration of the FET, and a shift of a bias point caused by the scattering of the threshold voltage Vth and a channel length modulation coefficient λ due to a short channel effect are corrected automatically. The scattering of a high frequency power amplifying characteristic can be reduced as a result.

Current-limiting circuitry

Abstract: A field effect transistor (FET) driver circuit includes an error amplifier for providing a FET control signal and a current limiting amplifier for preventing excessive current flow through the FET. The current limiting amplifier generates an overcurrent signal when an excessive current is detected. In response to the overcurrent signal, a voltage control circuit adjusts the voltage at the output of the error amplifier to turn off the FET. Meanwhile, a pulldown circuit at an input of the error amplifier adjusts the voltage provided to that input to cause the error amplifier to provide an output voltage that also tends to turn off the FET. If a buffer is present at that input to the error amplifier, a second pulldown circuit is placed at the input to the buffer to maintain a stable unity gain across the buffer.

Novel 900 MHz/1.9 GHz dual-mode power amplifier employing MEMS switches for optimum matching

Abstract: A novel scheme is proposed for a compact band-switchable power amplifier that employs Micro-Electro-Mechanical System (MEMS) switches in a matching network (MN). According to the on/off status, the switches change the frequency response of the MN, and then the optimum matching can be achieved in different frequency bands. Following the proposed scheme, a dual-band GaAs FET amplifier is designed for the 0.9-GHz and 1.9-GHz bands. The experimental results exhibit the small signal gain of greater than 16 dB and the saturated output power of 31 dBm in each frequency band with adequate efficiency. The performance levels are very close to those of single-mode power amplifiers employing the same FET.

Low power consumption adaptive power amplifier related application

Abstract: A power amplification circuit (10) includes a scalable power amplifier (20) to produce an RF output signal (50) at an output of the power amplification circuit (10), and a variable impedance circuit (30) coupled to the output of the power amplification circuit (10). The scalable power amplifier (20) includes a plurality of selectively activated amplifier elements (22), (24), (26) to produce the RF output signal (50) in accordance with a desired RF output signal power level. The power amplification circuit (10) selectively activates individual amplifier elements by, for example reducing power or increasing power to at least one amplifier element. The variable impedance circuit (30) varies an impedance of the variable impedance circuit (30) to dynamically load the output of the scalable power amplifier(20).

Operational transconductance amplifier input driver for class D audio amplifiers

Abstract: An audio preamplifier ( 10 ) based on an operational transconductance amplifier, in combination with a class D audio output amplifier ( 12 ) is disclosed. The input signal is coupled to the preamplifier ( 10 ) through a capacitor ( 14 ) in series with a resistor ( 17 ) that sets the transconductance of the preamplifier. The preamplifier ( 10 ) includes a differential operational amplifier ( 20 ) that drives output MOS transistors ( 22 a, 22 b ), which are biased by current sources ( 24 a, 26 a; 24 b, 26 b ). Feedback from the drain nodes of the output MOS transistors ( 22 a, 22 b ) to the inputs of the differential operational amplifier ( 20 ), along with the series capacitor ( 14 ) and resistor ( 17 ) input coupling, ensures minimum offset voltage and current at the output of the preamplifier ( 10 ). Common mode feedback control amplifiers ( 25, 29 ) ensure proper bias of the components into the saturation region.

Detecting and maintaining linearity in a power amplifier system through envelope power comparisons

Abstract: Small portable communication devices that support multiple modulation techniques cannot gain the benefits of using an isolator at the output of a power amplifier to provide stability in the load impedance. However, for communication devices that include amplitude modulation schemes, maintaining linear operation of the power amplifier is still required. In the presence of unstable load impedance, this can be a difficult task. As a solution, the linearity of the power amplifier is detected by comparing the envelope of the output signal with the base band signal used to modulate the output signal. If the envelopes are similar, then the power amplifier may be operating in the linear region. When the linearity of the power amplifier degrades, there is an increase in the difference between the envelopes. By adjusting the power level of the input signal to the power amplifier when the envelope difference appears, linearity of the power amplifier is maintained.

General-purpose wideband amplifier

Abstract: A single-stage amplifier includes (1) first and second “gain” transistors coupled in a common source configuration, (2) first and second resistors providing self-biasing for the first and second transistors, respectively, (3) first and second current sources providing bias currents for the first and second transistors, respectively, and (4) a load impedance coupled between the drains of the first and second transistors The amplifier may further include (5) third and fourth “compensation” transistors coupled in parallel with, and used to compensate parasitic capacitances of, the first and second transistors, respectively, and (6) third and fourth resistors providing self-biasing for the third and fourth transistors, respectively Variable gain may be achieved by varying the bias currents for the gain transistors A two-stage amplifier may be formed with two stages coupled in cascade, with each stage including most or all of the circuit elements of the single-stage amplifier

Amplifier and radio frequency power amplifier using the same

Abstract: An amplifier using a wide band, high efficiency, and low distortion amplifier free from clipping distortion, and a high efficiency and low distortion radio frequency power amplifier, using that amplifier, which can be applied to wide band wireless communication systems are provided. The amplifier has a DC-DC converter 2, augmented with a low pass filter 4, for amplifying the low frequency components of an input signal from a terminal 5, and a class B amplifier, augmented with a high pass filter, for amplifying the input signal and supplying its high frequency components after amplification. The DC-DC converter and the class B amplifier are connected in parallel, and the power supply voltage of the class B amplifier is controlled with the low frequency components of the input signal.

Dual antenna diversity transmitter and system with improved power amplifier efficiency

Abstract: Provided is a dual antenna diversity transmitter and system having improved power amplifier efficiency, and further comprising switches in the dual antenna diversity transmitter and system, to minimize a DC input power consumed by the power amplifier depending on the required transmitting output power and operate efficiently the power amplifier, whereby signal linearity can be maintained and the power amplifier can be efficiently operated in a more simplified manner, as compared to the conventional high efficiency power amplifier.

Multi-band low noise amplifier

Abstract: A multi-band low noise amplifier capable of operating in a plurality of band modes includes a plurality of input amplifiers respectively corresponding to the plurality of band modes and an output amplifier. Each input amplifier includes a receiving port for receiving a corresponding input signal in the band mode. The output amplifier includes at least a lowest-impedance port being a lowest-impedance node of the multi-band low noise amplifier and an output port for outputting the input signal processed by the output amplifier. The output amplifier is coupled to the plurality of input amplifiers at the lowest-impedance port.

Neutralization of feedback capacitance in amplifiers

Abstract: A transistor amplifier circuit has a current to current feedback transformer for neutralization of feedback capacitance and setting the input impedance of the amplifier. IM3 cancellation is implemented by out-of-band terminations at the input, which does not depend on the loading of the output of the amplifier. The IM3 cancellation contributes better linearity, while the capacitance neutralization contributes high and stable gain. These features are more orthogonal than other prior art techniques in terms of gain and linearity over a wide dynamic range. Hence there is less of a trade-off between the desirable properties of high gain and good linearity. Notably they can be implemented to have good efficiency and high levels of integration, which are important for many applications such as wireless transceivers for portable devices or consumer equipment. The amplifier can be a single ended or a differential common emitter amplifier. It can use GaAs HBTs for RF applications or other bipolar technologies (SiGe HBT, GaAs HBT, Si BJT).

Circuit and method for lowering insertion loss and increasing bandwidth in MOSFET switches

Abstract: A DC symmetrical FET switch includes second and third switches connecting the well of the symmetrical FET switch to the drains and the source when the symmetrical FET switch is on. When the three FET's are on, the well, source and drain of the symmetric FET switch all exhibit the same input signal, wherein the drains and source to well capacitances are substantially prevented from draining off any of the input signal, thereby increasing the bandwidth and decreasing the insertion loss of the switch. The second and third switches are also FET switches. An enable signal is connected to the gates of all three FET's turning them on and off together. When the enable is false the FET switches are turned off and their wells are driven to a potential a proper potential. When the FET's are n-type the potential is low and when the FET's are p-types the potential is high. A resistor is provided in the gate drive of the first FET switch that further increases bandwidth and decreases insertion loss of the switch by moving the break frequency of the drain and source to gate capacitances.

A method and a device for adjusting power amplifier properties

Abstract: A method and a device for tuning power amplifier (PA, 203) properties such as back-off. A peak-to-average value (PAR) of the amplifier input signal is first obtained by control means (206) and then used for adjusting the power amplifier (203) with tuning means (204, 208, 210) functionally connected to the amplifier (203). The suggested solution is advantageously exploited in a wireless communications device like a mobile terminal to optimize the performance thereof by, for example, reducing the power dissipation in the transmitter.

High efficiency feed-forward amplifier using RF predistortion linearizer and the modified Doherty amplifier

Abstract: The prototype model of the high efficiency feed-forward amplifier using RF predistortion linearizer and the modified Doherty amplifier is developed, and the performance of the developed amplifier is examined experimentally. The efficiency of 13.6% with the output power of 45W is achieved under the condition that ACLR (Adjacent Channel Leakage Power Ratio) is -55 dBc in 3 GPP test method at room temperature of +25/spl deg/C. This is the top level performance among the previously reported feed-forward amplifiers for cellular base stations. In concerning with the modified Doherty amplifier, which is the key component to enhance the efficiency of feed-forward amplifier, the design method and its performance is described in detail.

Charge recycling amplifier for a high dynamic range CMOS imager

Abstract: A high dynamic range amplifier circuit for amplifying pixel signals of an imager device is disclosed. The amplifier circuit uses a read-out scheme based on a charge recycling approach, where a pixel signal is first amplified with a low gain during a first amplification phase T 1 , and then the amplifier output is immediately recycled and the pixel signal amplified with a higher gain during a second amplification phase T 2.

Field effect transistor amplifier with linearization

Abstract: An amplifier comprises a source degeneration inductance and at least two field effect transistors coupled in parallel and having mutually different gate biasing. Source connections of the field effect transistors are coupled along different positions of the source degeneration inductance.

Single-ended input, differential output low noise amplifier

Abstract: An amplifier (Fig. 5) has an input (INH, LMD) terminal to receive an input signal. The amplifier (Fig. 5) includes a first gain stage (QA, QB) comprising a pair of input transistors (QA, QB) and a second gain stage (A1, A2) to drive an output stage (A1, A2). The output stage (A1, A2) provides inverting and non-inverting differential output signals on inverting (LON) and non-inverting (LOP) output nodes. The amplifier (Fig. 5) may also include a feedback signal electrically connected between the inverting (LON) and non-inverting (LOP) output nodes to emitters of the input transistors (QA, QB) through a resistor network (RFB).

Cryogenic amplifier for ∼1 MHz with a high input impedance using a commercial pseudomorphic high electron mobility transistor

Abstract: A cryogenic amplifier for ∼100 kHz to a few MHz is presented which uses a commercially available pseudomorphic GaAs/InGaAs high electron mobility transistor and dissipates less than 0.5 mW in the cryogenic stage. The input-referred voltage noise and current noise of the amplifier at approximately 2 MHz are measured to be approximately 0.7 nV Hz−1/2 and 25 fA Hz−1/2, respectively. A superconducting resonant circuit can be used to provide a high input impedance over a narrow bandwidth, or a low input impedance can be used to yield a large bandwidth. Although suitable for many applications, the amplifier has been developed for measurements of current noise from a high-impedance source, and its long-term stability is such that by averaging over 30 min, it could be used to detect approximately 0.6 fA Hz−1/2.