Showing papers on "Multipath routing published in 1983"

Minimum-Via Topological Routing

Abstract: A new approach to the two-dimensional routing utilizing two layers is proposed. It consists of two major steps, topological routing and geometrical mapping. This paper describes the topological routing algorithm in detail. Based on a circle graph representation of the net intersection information of the routing problem, a maximal set of nets that can be routed without vias are selected. The layer assignments for the selected nets are determined by a global analysis so that the total number of vias needed is minimum. The layer assignment problem turns out to be a maximum-cut problem on an edge-weighted graph and we developed a greedy algorithm for it. According to the layer assignments, the detailed topological routes are then generated.

Routing Techniques for Gate Array

Abstract: This paper describes the routing techniques used for a Hughes internally developed high-density silicon-gate bulk CMOS gate array family. This layout software can be easily adapted to different array sizes and/or technologies (e.g., bipolar) through a change of parameters. A routing model and hierarchical decomposition schemes are presented to address the routability issue. More specifically, this paper focuses on the formulation and analysis of global routing and vertical assignment problems and gives a systematic breakdown of the routing task into well-defined subtasks. Instead of performing sequential routing, techniques and formulations are introduced to achieve a high degree of order independency in all subtasks. In routing subtasks where iterations are required, independent selection and interconnection are performed to avoid order dependency in typical routing problems. Implementation results are provided to indicate the efficiency of the system.

Optimal Placement for River Routing

Abstract: River routing is the problem of connecting a set of terminals a 1,…,a n on a line to another set b 1,…,b n in order across a rectangular channel. When the terminals are located on modules, the modules must be placed relative to one another before routing. This placement problem arises frequently in design systems like bristle-blocks where stretch lines through a module can effectively break it into several chunks, each of which must be placed separately. This paper gives concise necessary and sufficient conditions for wirability which are applied to reduce the optimal placement problem to the graph-theoretic single-source-longest-paths problem. By exploiting the special structure of graphs that arise from the placement problem for rectilinear wiring, an optimal solution may be determined in linear time.

River Routing: Methodology and Analysis

Abstract: The problem of river routing across a channel is only a special case of more general routing configurations Both its methodological and combinatorial characteristics can be extended in useful ways which will be explored in this paper The two characteristics that we generalize here are planarity and grouping Planarity means that the connections are realizable in one layer; ie the interconnection pattern of the nets is planar Grouping means that the connections are made in order, that is to say that the routing of net i+l is adjacent, conceptually and preferably physically, to the routing of net I

Single Row Routing

Abstract: The automated design of multilayer printed circuit boards is of great importance in the physical design of complex electronic systems. Wire routing is a crucial step in the design process. In this paper, the single row routing problem is considered. First, we discuss the relevance of single row routing in the context of the general routing problem. Then, we show that relaxing the restriction that backward moves are not allowed can result in smaller street congestions when there are at least four tracks in each street. Next, we obtain an O((2k)!kn log k) algorithm to determine whether or not an instance involving n nodes can be laid out (without backward moves) when only k tracks per street are available. With the additional restriction that wires are not permitted to cross streets, an efficient (O(n2)) algorithm is obtained. This restricted problem is shown to be related to a furnace assignment problem.

Optimal routing in closed queuing networks

Abstract: In this paper, we establish criteria and propose algorithms for the optimal routing of traffic in closed queuing networks. The objective is to maximize total throughput or (equivalently) to minimize overall average delay. We show that delay is convex over the set of routing patterns in networks with a single class of customers. This enables us to develop a downhill technique for finding the global minimum. The efficiency of our algorithm rests on the fact that the steepest descent direction is readily obtained at each iteration from the MVA algorithm. For multiple-class networks a counterexample is presented to show that convexity does not hold. The technique, however, can still be used to obtain local minima. The algorithm is applied to the optimization of routing in flow-controlled packet-switched networks. Several numerical examples are presented.

Dynamic Routing and Call Repacking in Circuit-Switched Networks

Abstract: The performance of three dynamic routing techniques for small circuit-switched networks is compared by simulation with three static routing techniques and with a repacking technique for calls in progress. It is found that dynamic routing algorithms improve network performance by increasing the number of paths available for call connection over what would otherwise be available to a corresponding static routing. It is also shown that call repacking increases the amount of carried traffic significantly, and that this improvement is obtained by a different mechanism than for dynamic routing. The possibility of combining the two techniques is also investigated, and general characteristics of good dynamic routing techniques are presented.

An Automatic Routing Scheme for General Cell LSI

Abstract: An automatic routing scheme intended dedicatedly for general cell LSI is described, which is constructed of a number of algorithms such as for net ordering, global routing, and detailed routing. This scheme is distinctive in that channel constraint loops are broken automatically at the stage of global routing, and a grid-free routing scheme is employed at the state of detailed routing. The routing program based on this scheme has been incorporated into a design system for LSI which is at work in practice. A part of implementation results are also shown.

Order of Channels for Safe Routing and Optimal Compaction of Routing Area

Abstract: For a given placement of blocks and global routing of nets, a new formulation and its solution of the problem of determining the order of channels for the complete channel routing are presented. If the order of channels satisfying the condition exists, it is called the safe order since following it, each channel can be routed the wiring requirement without any prediction of necessary width. Thus the compaction of the routing area can be made utmost each time. The idea is based on the general feature of channel routers not on any particular one. Related subjects such as the simultaneously routable channels, generalization of the safe order, switch box routing, and the placement with nonrectangular blocks are discussed.

Automatic Variable-Width Routing for VLSI

Abstract: Some of the essentials for layout of complex VLSI circuits are hierarchical design based on macrocells of arbitrary size and shape, power nets with local varying width, signal nets with individual width and very compacted layouts which still have to guarantee all geometrical design rules. This paper is devoted to the problem of automatic routing with real geometries. VWROUT, a Variable Width Routing System is presented. This includes planar power net routing with variable width on a single layer, loose and final routing of signal nets with variable width on two layers (H-V routing), and layout compaction with design-rule verification. Though automatic routing systems have been developed successfully, the intention of this paper is to demonstrate that layout programs of today have not yet become perfect. A lot of effort in software development is necessary in order that automatic layouts can compared with manual designs.

A New Channel Routing Algorithm

Abstract: This paper presents a new algorithm for solving the two-layer channel routing problem with doglegging. Based on a set of intuitive and reasonable heuristics, the algorithm tries to obtain a channel routing configuration with a minimum number of tracks. For every benchmark problem tested, the algorithm gives a routing configuration with the smallest number of tracks reported in the literature.

Reducing Channel Density in Standard Cell Layout

Abstract: The problem of global routing in standard cell layouts so as to minimize total channel density is considered. A sub-problem of this, called the linear net routing problem (LNRP), is defined and is argued to be the key to a successful solution to the general problem. A polynomial-time heuristic for LNRP is presented and its behavior analyzed. In particular, it is proven that the heuristic can produce results as bad as, but no worse than, 50% over the optimal.

Order of Channels for Safe Routing and Optimal Compaction of Routing Area

Abstract: For a given placement of blocks and global routing of nets, a new fonnulation and its solution of the problem of detennining the order of channels for the complete channel routing are presented. If the order of channels satisfying the condition exists, it is called the safe order since following it, each channel can be routed the wiring require­ ment without any prediction of necessary width. Thus the compaction of the routing area can be made utmost each time. The idea is based on the gene ral feature of channel routers not on any particular one. Re­ lated subjects such as the simultaneously rout able channels, generaliza­ tion of the safe order, switch box routing, and the placement with non­ rectangular blocks are discussed. ment and its global routing. Following the safe order if it exists, the routing of each channel can be completed without any prediction of necessary width. The formulation is made in an axiomatic way based on the definition of element channels and the common features of channel routers. The discussion is made graph theoretically. It is a direct conse­ quence of the definition that following a safe order, compaction of redundant space (width) of each channel after routing can be made utmost each time. Some further considerations are given to the omission of a certain constraint with respect to the channel width, simultaneously safe channels, routing of the so-called switch boxes (1), and placement including non­ rectangular blocks. It should be remarked that part of essentials of the conclu­ sion in this paper is found in (2) though the formulation and reasoning are pretty different, particularly in that they imposed the idea as the design rule and hence their model always has a safe order while this paper is to present an analysis tool for a given placement and global routing.

Fault tolerant capabilities of redundant multistage interconnection networks (multiprocessors)

Abstract: Various methods to introduce alternate paths in multistage interconnection networks to make them more fault tolerant are discussed. Redundant networks such as IADM, IADM with half links, gamma network, extra stage cube network and f-network are described with reference to the number of alternative paths, nature of paths, routing algorithm and their capabilities to survive under single and multiple fault conditions. Comparative merits and demerits in terms of hardware, complexity of routing algorithms and improvements in fault tolerance are discussed. 18 references.

On the structure of decentralized dynamic routing strategies

Abstract: The problem of dynamic routing in data communication networks is considered. A model is introduced which takes into proper account the decentralization of the information about the network status. The problem is thus considered in a team-theory framework and the structure of the optimal strategies is derived.

Adaptive Routing for Damaged Networks

Abstract: This paper proposes and examines adaptive routing algorithms for communication networks that are subject to damage. These algorithms route calls through the network when the network configuration is not fully known, and adaptively reorder the routing tables as they gather more information about the network configuration. (The path that a call follows in the network is determined by routing tables. When a call reaches a node, a routing table is consulted to find the next node to attempt.) We concentrate on learning mechanisms that reorder the routing tables in real-time. For example, the success-to-top mechanism moves the table entry that led to a successful connection of a call to the top of the routing table. Success-to-top leaves the relative order of the other entries in the routing table unchanged. Other possible schemes include failure-to-bottom (entries that lead to unsuccessful connection attempts are placed on the bottom of the list), and success-up-one (in which the successful entry is moved up by one in the routing table). Markov chain models are described for success-to-top and failure-to-bottom schemes. Analytical expressions for the steady-state probabilities are used to form measures for these two strategies. We compare these measures for a wide selection of blocking probabilities. Further, a simulation model is used to evaluate the merits of all three (and more) schemes. The simulation provides network measurements not available from the analytical model. The simulation also examines information sharing mechanisms in which a single call is used to change the routing tables at many nodes.

Optimal Routing in the Cube-Connected Cycles Interconnection Network

Abstract: An optimal message routing algorithm for thc cube-connected cycles processor interconnection network is described, and the average:- message path length is derived assuming a uniform message routing distribution. The optimal algorithm is comparetl to one preViously proposed and is shown to have significanlly shorter average path length.

Theory and algorithms for signal routing in integrated circuit layout

Abstract: Integrated circuit layout deals with the problem of realizing a specified circuit description by a geometrical layout on a silicon chip. With the very high complexity of integrated circuits, hierarchical decomposition is generally used to reduce the size of the layout problem to a level where computation and design is feasible. At each level of the hierarchy, the circuit layout problem becomes the problem of placing a set of circuit blocks (placement) and routing a set of interconnections between circuit blocks (routing). This problem is usually divided into a sequence of subproblems, namely: initial placement, placement improvement, global routing, and detailed routing. This dissertation deals with the development of efficient computer algorithms and basic theoretical understanding for the detailed routing problem. A rectilinear routing region with fixed terminals on all sides is usually referred to as a two dimensional routing problem. For a two-dimensional routing problem with two layers available for routing, we developed a general and practical two-dimensional routing algorithm. For the case when there is only one layer for routing, a general river routing algorithm is devised. Traditional via minimization algorithms try to minimize the number of vias used for a particular routing solution. Here we investigate a new technique which tries to find a topological solution with globally minimal number of vias. This investigation depends on a special graph representation of the routing problem and the use of related graph theoretical algorithms. A geometrical mapping algorithm which maps a topological solution onto a rectilinear plane is also included. Through this investigation, much insight into the global characterization of the routing problem has been achieved. An intelligent automatic hierarchical building block layout (BBL) system has been set up. Different placement and routing algorithms can be implemented and tested by using this system.