Showing papers on "Power MOSFET published in 1984"

The evolution of power device technology

Abstract: Power semiconductor devices and their associated technology have come a long way from their beginnings with the invention of the bipolar transistor in the late 1940's. Presently, the spectrum of what are referred to as "power devices" span a very wide range of devices and technology from the massive 4 in, 3000-A thyristor to the high-voltage integrated circuit and the power MOSFET, a device of VLSI complexity containing up to 150 000 separate transistors. In this paper, the past, present, and future of power devices will be reviewed. The first section will be a historical perspective indicating the key events and developments of the past that brought the power devices of today to their present state. The second section of the paper will review the technology and characteristics of bipolar power devices with separate subsections on thyristors, the gate turnoff thyristor (GTO), and the bipolar transistor. Within the thyristor subsection there will be discussions of the phase control thyristor, the inverter thyristor, the asymmetric thyristor (ASCR) the reverse conducting thyristor (RCT), the gate-assisted turn-off thyristor (GATT), and finally the light-triggered thyristor (LTT). The third section of the paper is devoted to the new field of integrated power devices and will review the evolution to the present power MOS devices including the power MOSFET, the insulated gate transistor (IGT), and the high voltage IC (HVIC). The last section of the paper reviews the future of power devices with projections as to future ratings of power devices for both the traditional bipolar devices, such as the thyristor, GTO, and bipolar transistor, as well as the integrated devices such as the MOSFET and the IGT. In case of the former, in particular the thyristor, the maximum device ratings will be tied to the availability of large area float zone material, currently difficult to obtain in the high resistivities needed for power devices. In the case of integrated devices, the maximum ratings will be limited by the maximum die area for which acceptable device yields can be obtained. This is identical to the situation for conventional IC's since much of the unit processing is the same.

MOSFET "H" Switch circuit for a DC motor

Abstract: A MOSFET "H" switch circuit for providing bidirectional control to a DC motor. The power MOSFET's employed have significant advantages over bipolar and darlington power transistors and allow for microcomputer interfacing for providing bidirectional rotational control as well as motor speed control by pulse width modulation.

Switching speed enhancement in insulated gate transistors by electron irradiation

Abstract: High-speed switching in insulated gate transistors (IGT's) has been achieved by using electron irradiation. This technique allows excellent control over the switching speed with the ability to reduce the gate turn-off time from over 20 µs to under 200 ns. This increase in speed is accompanied by an increase in the forward voltage drop during current conduction. This necessitates performing a trade-off between switching and conduction losses. Despite the increase in the forward drop, the IGT's exhibit superior characteristics in comparison with power MOSFET's and bipolar transistors up to switching frequencies of 100 kHz.

An analysis and experimental verification of parasitic oscillations in parralleled power MOSFET's

Abstract: An analysis of the small signal dynamic model of the power MOSFET is presented which predicts the existence of high-frequency parasitic oscillations when these devices are electrically paralleled. It is shown that the existence of these oscillations is a strong function of the small signal transfer admittance g m and the differential mode drain, gate, and source resistances. The sensitivity of the oscillations to these parameters is determined. Experimental data verifying the qualitative aspects of the analytical results is presented. It is concluded that the problem is potentially most severe for devices which are paralleled by the manufacturer at the chip level. A practical solution to the problem is the introduction of differential mode gate resistance, either as lumped components, or by the use of polysilicon overlays.

Power FET driving circuit

Abstract: Driving circuit 5 of power FET 1, having intrinsic capacitance 2 between gate and source, receives from control circuit 4 a first (A) and a second (B) pulse voltage, said voltages being shifted 180° out of phase each from other and having a fixed frequency and a duty cycle ratio which varies up to a maximum of 50%. The pulse voltage are applied to the ends of the primary winding of transformer 50 which therefore results supplied by alternately positive and negative pulses. Some diodes (51A, 51B and 52A. 52B) rectify the voltage on the secondary windings of the transformer and render available on nodes R, S a control pulse voltage having a frequency twice of that one of the pulses in input to the transformer and duty cycle ratio which varies up to a maximum of 100%. The control pulse voltage, when it rises to logical/ electrical level 1, charges very fast intrinsic capacitance 2 of FET 1 because bipolar transistor 57 is nearly immediately switched OFF. On the contrary, when the control pulse voltage falls to logical/electrical level 0, bipolar transistor 57 is switched ON by the same charge voltage of intrinsic capacitance 2 and allow a fast discharging of such capacitance.

Fast turn-off circuit for photovoltaic driven MOSFET

Abstract: A power MOSFET is controlled by illuminating a single photovoltaic generator which produces an output current which charges the gate capacitanace of the power MOSFET to turn on the device. A sensing impedance which may be a diode, MOSFET or other component is connected between the photovoltaic generator and the gate of the power MOSFET. The sensing impedance in the disclosed embodiment is a diode. The sensing impedance forces the power MOSFET gate voltage instantaneously to follow the photovoltaic generator output voltage. The diode is connected in series with the charging circuit and a switching transistor is connected in parallel with the gate capacitance of the MOSFET. The switching transistior base is coupled to the output of the photovoltaic source so that, when the photovoltaic source turns off, and the voltage of the photovoltaic source decays below a predetermined value, the switching transistor turns on to short-circuit the MOSFET gate capacitance so that it can immediately discharge to provide fast turn-off of the power MOSFET. A dV/dt clamping circuit is provided to prevent false charging of the power MOSFET gate through its drain-to-gate capacitance.

A new vertical double diffused MOSFET—The self-aligned terraced-gate MOSFET

Abstract: A new power MOSFET structure with a Self-aligned Terraced Gate (STGMOSFET) is demonstrated. The unique gate structure of the STGMOSFET reduces the parasitic gate capacitances, resulting in improved high-frequency performance. The STGMOSFET structure was used to design a 3.5 mm × 3.5 mm transistor. This chip had an on-resistance of 2.3 Ω and a 500-V source-drain breakdown voltage. It exhibited excellent high-frequency performance with a cut-off frequency of 100 MHz, and rise and fall times of 5 and 20 nS, respectively.

Current overload protected solid state relay

Abstract: A control circuit for protecting a metal oxide semiconductor field-effect power transistor from current overloads is disclosed in one embodiment of the control circuit A silicon controlled rectifier is used to remove the bias voltage from the MOSFET in the event of a current overload In another embodiment of the invention a bipolar transistor in combination with a second MOSFET is used to turn off the power MOSFET in the event of a current overload The voltage appearing across the power MOSFET is used as an indication of a current overload condition

Microwave power GaAs MISFET's with undoped AlGaAs as an insulator

Abstract: A metal-insulator-semiconductor field-effect transistor using an undoped AlGaAs layer as an insulator has been fabricated and RF tested. Due to the higher breakdown field of the wide-band-gap AlGaAs, the gate breakdown voltage has been greatly improved as compared with a conventional GaAs MESFET. The prebreakdown gate leakage current of this new device structure is also much lower than that of the MESFET. The presence of the gate insulator also reduces the gate capacitance. All these factors result in a GaAs power FET structure with potentials for high power, efficiency, and frequency of operation. An unoptimized 750-µm gate-width device achieved an output power of 630 mW with 7-dB gain and 37-percent power-added efficiency at 10 GHz. At reduced output power levels, power-added efficiency as high as 46-percent was obtained at X-band.

Self-aligned power MOSFET with integral source-base short and methods of making

Abstract: Double diffused power MOSFET's and methods of manufacture. The source, base and drain regions of a double diffused power MOSFET correspond respectively to the emitter, base and collector of a parasitic bipolar transistor. Double diffused power MOSFET's perform better when provided with an ohmic short between the source and base regions to prevent turn-on of the parasitic bipolar transistor. In one form of ohmic short between the base and source regions, the source terminal comprises a metallic electrode, preferably aluminum, deposited over the source region, and the ohmic short comprises at least one microalloy spike extending from the source terminal metallic electrode through the source region and partly into the base region. Such microalloy spikes are formed by heating the semiconductor substrate after the metallic electrode has been deposited under appropriate conditions. In another form, a V-groove is formed by preferential etching in the source and base regions. In particular the V-groove extends through the source region, with the bottom of the V-groove extending only partly into the base region. A metallic source electrode is deposited over the source region and into the V-groove in ohmic contact with both the source and base regions to form both the source terminal and the ohmic short. These two forms of ohmic short are integral in nature, and facilitate an overall MOSFET structure and manufacturing process characterized by a minimum number of masking steps, self-alignment, and increased active device area.

A Packaged 20-GHz 1-W GaAs MESFET with a Novel Via-Hole Plated Heat Sink Structure

Abstract: A novel Via-Hole plated heat sink (PHS) structure with an improved gate-packing density is developed for K-band GaAs power FET's. The gate-packing density in this structure is increased to four times greater than that in the conventional direct via-hole structure, by making via-holes under the source-grounding pads fabricated outside the FET active area. The increase in the gate-packing density allows the design of a high-power, high-frequency FET with a larger gate periphery. The resultant 2.4-mm gate periphery device with 0.7µm gate length delivered 1.1 W (30.4 dBm) of output power with 5.0-dB gain and 19.2-percent power added efficiency at 20 GHz, and exhibited 0.74 W (28.7 dBm) at 30 GHz. The same type of device assembled in the hermetically sealed package delivered 1.0 W (30 dBm) of output power with 4.8-dB gain and 13-percent power added efficiency at 20 GHz. Thermal and mechanical-environmental tests were made to assess the reliability of the novel Via-Hole PHS FET. Results showed no failure nor significant change in device parameters throughout the tests.

A Comparative Study of Single-Phase Modulated AC Choppers

Abstract: With the increased availability of power MOSFET's and GTO's, a new generation of simple choppers for small and medium ac loads is foreseen. These new power semiconductors ease the use of forced commutation to improve the supply power factor even with highly reactive loads. Asymmetrically-and symmetrically modulated ac choppers designed to operate with reactive loads are described. The ability of the asymmetric chopper to hold a unity power displacement factor for a large range of reactive loads presents interest for induction machine controllers. On the other hand, the supply current produced by the symmetrical chopper has a less objectionable harmonic content than the asymmetrical chopper over a large range of operating conditions. Both choppers are compared to the common ac phase controller, with or without freewheeling switch. Experimental results confirm the analytical analysis. The practical limits of operation for the new choppers are also discussed.

Study of the switching performance of a power MOSFET circuit

Abstract: Extremely short switching times can be achieved by using a power MOSFET. This paper deals with the electrical stress of power MOS devices, caused by short switching times in a circuit with parasitic network parameters and device parameters. The switching behaviour is studied theoretically as well as experimentally. The most familiar types of power MOSFETs implies a pn-diode as well as a blocked npn-transistor. The experimental part of this work studies the influence of this parasitic bipolar transistor (PBT) during commutation. The critical values of di/dt and du/dt are shown. For the theoretical investigations of the switching behaviour, the power MOSFET has been replaced by a suitable equivalent circuit with values only being given in standard data sheets. The nonlinear FET capacitances as well as the charge stored in the freerunning diode are taken into consideration.

High-power conductivity-modulated FET's (COMFET's) with a p-type channel

Abstract: In previous work, a conductivity-modulated field-effect transistor (COMFET) having drastically reduced on-resistance was described; that device was based on n-channel MOS technology. In this letter, we report the development of a complementary device-the p-channel COMFET. These new p-channel COMFET's have demonstrated dc on-resistance values as low as 0.07 Ω at 20 A (for a 3 mm × 3 mm pellet), while providing forward blocking voltages of 200-400 V. To our knowledge, this on-resistance value (normalized to the same active area) is lower than that of any p-channel power MOSFET (even those with blocking voltages of only 100 V) and as much as 30 times less than that of a p-channel MOSFET with a comparable blocking-voltage capability. Using suitable minority-carrier-lifetime control techniques, drain-current-decay times have been reduced from ≈ 30 µs to below 1 µs.

Circuit arrangement, without a transformer, for generating small DC voltages

Abstract: In a circuit arrangement, without a transformer, for generating small DC voltages (UA) from mains AC voltages (U &sinew& ), a capacitor (C) is charged with a voltage rectified by the rectifier (D). The phase-shifter (Ph) produces a phase-shifted voltage (UPh) which, via the switching logic (L), directly operates the switching element (T), which is constructed as a power MOSFET and interrupts the capacitor charging. The load (RL) is connected in parallel with the charging capacitor (C).

A Depletion-Mode MOSFET Model for Circuit Simulation

Abstract: A four-terminal model is formulated for the depletion-mode MOSFET using simple charge-voltage relationships. Different regions of operation are taken into account according to the surface conditions such as accumulation, depletion, and inversion. This simple formulation is then modified to account for the second-order effects such as mobility reduction, drift-velocity saturation, and channel length modulation. Simple expressions are used to express the model parameters in terms of device dimensions. A charge-based capacitance model is used to compute transient currents. The depletion-mode model is implemented in the circuit simulation program HP-SPICE and the simulation results are discussed.

A large-area power MOSFET designed for low conduction losses

Abstract: A new power MOSFET has been fabricated that conducts 75 A with an on-state resistance of 0.012 Ω and blocks 60 V. The device may be used as a low-loss synchronous rectifier in efficient high-frequency power supplies or as a high-current power switch in applications such as emitter switching. The device design criteria include obtaining the largest possible fraction of the ideal blocking voltage and obtaining the minimum on-State resistance. Efficient utilization of the device area requires smaller feature size and shallower junction depths for low-voltage power MOSFET's than for high-voltage ones. The device reported on is 300 mils on a side and contains over 60 000 MOSFET cells in parallel. It has a gate width of more than 4 m. This device is larger and more complex than any previously reported power MOSFET. It provides an example of how power device processing techniques are approaching those of LSI circuit technology.

Analysis of latchup susceptibility in CMOS circuits

Abstract: The traditional npn- pnp transistor model for CMOS latchup does not adequately describe the performance of modern epitaxial devices, especially when holding voltage is in excess of one volt. In this paper, a model is discussed which correctly represents bulk ohmic voltage drop in the latchup region near the surface of epitaxial devices. Analysis of this model indicates that, for sufficiently thin epitaxial layers, tank contact placement is the most important factor in producing latchup free devices with holding voltage greater than the power supply voltage. Effects of substrate, bias are also discussed, and it is concluded that although holding voltage is increased by application of substrate bias. use of an on-chip charge pump to provide the bias can produce undesirable cumulative transient effects.

j-MOS: A versatile power field-effect transistor

Abstract: A novel field-effect transistor (FET) structure that is attractive for power control applications is proposed and demonstrated. It combines MOSFET structural features and junction FET function in a simple, self-aligned structure that we refer to as j-MOS. Lateral j-MOS transistors were fabricated in silicon-on-sapphire (SOS) with on-resistance as low as 2.5 Ω in 1 cm of channel width. From this result, we project that a vertical version of j-MOS can be fabricated in silicon-on-buried insulator (SOI) with a specific on-resistance ≤ 1 m Ω.cm2, approximately a factor of two improvement over current power FET technology.

Switching waveforms of the L 2 FET: A 5-volt gate-drive power MOSFET

Abstract: Switching waveforms of a newly announced series of power-MOSFET devices called Logic-Level-FETs (L 2 FETs) and featuring a 5-volt gate drive are presented and contrasted to the more conventional 10-volt-gate-drive devices. A new method of characterizing MOSFET switching performance is discussed in which the MOSFET is treated as a vertical JFET driven in cascade from a low-voltage lateral MOS. The 2:1 advantage in rise and fall-time and the 4:1 reduction in switching "dynamic V(sat)" dissipation with constant drive power of the 2 L FET over the 10-volt MOSFET are demonstrated and discussed.

Push-pull oscillator with power MOSFET

Abstract: The push-pull oscillator contains a parallel resonant circuit with an inductance (L2) with centre tap and a feed choke (L1) The current in the main branches is controlled by one power MOSFET (1, 2) each The power MOSFETs are cross-coupled with one another via limiters (3, 4) which, on the one hand, have a low impedance below the limit value On the other hand, the control voltages (UG1, UG2) for the power MOSFETs (1, 2) are limited to a value which is not hazardous the gate-source capacitance of the power MOSFETs

Circuit arrangement for a proximity switch with two connections

Abstract: In a circuit arrangement for a proximity switch (N) having two connections (a, b), particularly for use in control systems with alternating voltages, a power MOSFET (T) is used both as a power switch and for supplying the proximity switch (N) with current.

A C-Band 10 Watt GaAs Power FET

Abstract: A new GaAs high power FET has been developed. The FET chip with 10.8mm gate-width employs a deep recess, via hole PHS, anair bridge gate-source cross-over and novel gate feeder network technology. The internally matched device which consists of two chips (total gate-width; 21.6mm) has realized 10 watts of 1dB gain compression power with 8dB gain and 43% power added efficiency at 8GHz.

Variable pulse width piezoelectric ultrasonic transducer driver

Abstract: Requirements of ceramic piezoelectric ultrasonic transducer drive circuits are discussed in the light of today's advanced non-destructive testing techniques. A new drive circuit based upon power MOSFET devices, which overcomes many of the shortcomings of capacitor discharge circuits, is described. This driving technique enables transducers of a wide range of resonant frequencies to be driven from a single drive unit. It also enables transducer characteristics to be optimized for particular applications by control of the drive pulse shape.

An Investigation into Radiation Induced Second Breakdown in N Channel Power MOSFETs

Abstract: The second breakdown phenomenon in an N channel power mosfet, induced by transient gamma irradiation, is demonstrated in a commercial device. A specially developed radiation hard power mosfet (Mullard Ltd) is shown to be much less susceptible.

A flip-chip GaAs power FET with gate and drain via connections

Abstract: A new microwave device format that combines flip-chip mounting and via-connection technologies is described. This approach avoids many of the compromises that are inherent in conventional microwave monolithic circuits and will be particularly important in power applications. This letter reviews the rationale for this device format and describes a new method of forming via connections through thick semi-insulating substrates using laser drilling. Preliminary discrete GaAs FET's have been fabricated and results have been obtained through 18 GHz. At 12 GHz, an output power of 308 mW, a 28-percent power-added efficiency, and a 4.5-dB gain have been achieved with a 0.6- mm-wide GaAs FET. Efficiencies as high as 31 percent were achieved with these preliminary devices.

A MOSFET power amplifier with error correction

Abstract: The rapid evolution of power MOSFETs during the last few years has brought them to the point where they are now very attractive for use in audio amplifier power output stages. Important improvements include in­ creased voltage, current, and dissipation ratings, re­ duced "on" resistance, availability of complementary pairs, and greatly reduced cost. Although a 75-W MOSFET is still more expensive than a 150-W bipolar transistor, the premium is small when considered rel­ ative to total amplifier cost and improved performance. The purpose of this paper is to demonstrate the level of performance achievable with current technology and to illustrate practical circuit techniques for achieving this performance. Power MOSFETs have several fundamental advan­ tages over bipolar power transistors, most notably speed and freedom from secondary breakdown. The latter provides higher "usable" power dissipation, improved reliability, and freedom from safe-area limiter circuits, which can misbehave and cause audible degradation . MOSFETs also have some disadvantages in comparison with bipolar transistors. These include higher turn-on voltage drive requirements and smaller transconduct­ ance at low current levels . The former tends to contradict generalizations that have been made to the effect that drive circuits for power MOSFETs are less expensive, at least for the reliable source-follower configuration. The latter results in transconductance droop in the cross­ over region if bias currents are not fairly high. Such transconductance droop can result in crossover distortion.

Wideband driver for power MOSFETs

Abstract: A power MOSFET drive circuit which is not referenced to ground and which is suitable for wideband applications is reported. Biasing power and triggering signals are transformer-coupled separately to achieve electrical isolation between the driving circuitry and the controlled power stage.