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Alexis Farcy
Researcher at STMicroelectronics
Publications - 192
Citations - 2212
Alexis Farcy is an academic researcher from STMicroelectronics. The author has contributed to research in topics: Capacitor & Integrated circuit. The author has an hindex of 23, co-authored 191 publications receiving 2016 citations.
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Journal ArticleDOI
Innovative Materials, Devices, and CMOS Technologies for Low-Power Mobile Multimedia
Thomas Skotnicki,Claire Fenouillet-Beranger,C. Gallon,F. Buf,Stephane Monfray,F. Payet,A. Pouydebasque,M. Szczap,Alexis Farcy,Franck Arnaud,Sylvain Clerc,M. Sellier,A. Cathignol,Jean-Pierre Schoellkopf,E. Perea,R. Ferrant,H. Mingam +16 more
TL;DR: In this article, a detailed analysis and potential solutions for prolonging CMOS as the leading information technology are presented, along with the state of the art, requirements, and solutions at the level of materials, transistor, and technology.
Proceedings ArticleDOI
A multi-wavelength 3D-compatible silicon photonics platform on 300mm SOI wafers for 25Gb/s applications
Frederic Boeuf,Sebastien Cremer,Nathalie Vulliet,Thierry Pinguet,Attila Mekis,Gianlorenzo Masini,Lieven Verslegers,Peng Sun,Ali Ayazi,N-K Hon,Subal Sahni,Y. Chi,B. Orlando,D. Ristoiu,Alexis Farcy,Francois Leverd,Lucile Broussous,D. Pelissier-Tanon,C. Richard,L. Pinzelli,Remi Beneyton,Olivier Gourhant,E. Gourvest,Y. Le-Friec,D. Monnier,P. Brun,M. Guillermet,D. Benoit,K. Haxaire,Jean-Robert Manouvrier,Sébastien Jan,H. Petiton,J.F. Carpentier,T. Quemerais,Cedric Durand,Daniel Gloria,M. Fourel,F. Battegay,Yannick Sanchez,E. Batail,F. Baron,Philippe Delpech,L. Salager,P. De Dobbelaere,B. Sautreuil +44 more
TL;DR: In this paper, the authors describe a 300mm Silicon Photonics platform designed for 25Gb/s and above applications at the three typical communication wavelengths and compatible with 3D integration.
Proceedings ArticleDOI
Reliable 300 mm Wafer Level Hybrid Bonding for 3D Stacked CMOS Image Sensors
Sandrine Lhostis,Alexis Farcy,E. Deloffre,F. Lorut,Sébastien Mermoz,Yann Henrion,L. Berthier,F. Bailly,Daniel Scevola,Francois Guyader,F. Gigon,C. Besset,S. Pellissier,N. Hotellier,A. L. Le Berrigo,Stephane Moreau,V. Balan,Frank Fournel,A. Jouve,S. Cheramy,M. Arnoux,Bernhard Rebhan,G. A. Maier,L. Chitu +23 more
TL;DR: In this article, the authors presented the morphological and electrical characterizations of a test vehicle using a dual damascene integration for the hybrid bonding level and analyzed the main parameters to assess the bonding interface quality.
Proceedings ArticleDOI
Recent progress in Silicon Photonics R&D and manufacturing on 300mm wafer platform
Frederic Boeuf,Sebastien Cremer,Enrico Temporiti,Massimo Fere,Mark Andrew Shaw,Nathalie Vulliet,B. Orlando,D. Ristoiu,Alexis Farcy,Thierry Pinguet,Attila Mekis,Gianlorenzo Masini,Peng Sun,Y. Chi,H. Petiton,Sébastien Jan,Jean-Robert Manouvrier,Charles Baudot,P. Le Maitre,J.F. Carpentier,L. Salager,Matteo Traldi,Luca Maggi,D. Rigamonti,C. Zaccherini,C. Elemi,B. Sautreuil,Luigi Verga +27 more
TL;DR: A low cost 28Gbits/s Silicon Photonics platform using 300mm SOI wafers is demonstrated and process, 3D integration of Electronic and Photonic ICs, device performance, circuit results and low cost packaging are discussed.
Proceedings ArticleDOI
High frequency characterization and modeling of high density TSV in 3D integrated circuits
TL;DR: In this article, high frequency characterization and modeling of Through Silicon Vias (TSVs) for new 3D chip staking are presented, focusing on high density TSVs, up to 106 cm−2, with pitch below 10 µm and aggressive wafer thinning.