F
Franck Arnaud
Researcher at STMicroelectronics
Publications - 106
Citations - 2183
Franck Arnaud is an academic researcher from STMicroelectronics. The author has contributed to research in topics: CMOS & Transistor. The author has an hindex of 23, co-authored 101 publications receiving 1904 citations. Previous affiliations of Franck Arnaud include IBM.
Papers
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Proceedings ArticleDOI
28nm FDSOI technology platform for high-speed low-voltage digital applications
Nicolas Planes,Olivier Weber,V. Barral,Sebastien Haendler,D. Noblet,D. Croain,M. Bocat,P.O. Sassoulas,Xavier Federspiel,Antoine Cros,A. Bajolet,E. Richard,B. Dumont,Pierre Perreau,David Petit,Dominique Golanski,Claire Fenouillet-Beranger,N. Guillot,Mustapha Rafik,Vincent Huard,S. Puget,X. Montagner,M-A. Jaud,O. Rozeau,O. Saxod,Francois Wacquant,Frederic Monsieur,D. Barge,L. Pinzelli,M. Mellier,Frederic Boeuf,Franck Arnaud,Michel Haond +32 more
TL;DR: This work demonstrates 32% and 84% speed boost at 1.0V and 0.6V respectively, without adding process complexity compared to standard bulk technology, to show how memory access time can be significantly reduced thanks to high Iread, by keeping competitive leakage values.
Journal ArticleDOI
Innovative Materials, Devices, and CMOS Technologies for Low-Power Mobile Multimedia
Thomas Skotnicki,Claire Fenouillet-Beranger,C. Gallon,F. Buf,Stephane Monfray,F. Payet,A. Pouydebasque,M. Szczap,Alexis Farcy,Franck Arnaud,Sylvain Clerc,M. Sellier,A. Cathignol,Jean-Pierre Schoellkopf,E. Perea,R. Ferrant,H. Mingam +16 more
TL;DR: In this article, a detailed analysis and potential solutions for prolonging CMOS as the leading information technology are presented, along with the state of the art, requirements, and solutions at the level of materials, transistor, and technology.
Journal ArticleDOI
A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization
David Jacquet,Frederic Hasbani,Philippe Flatresse,Robin Wilson,Franck Arnaud,Giorgio Cesana,Thierry Di Gilio,Christophe Lecocq,Tanmoy Roy,Amit Chhabra,Chiranjeev Grover,Olivier Minez,Jacky Uginet,Guy Durieu,Cyril Adobati,Davide Casalotto,Frederic Nyer,Patrick Menut,Andreia Cathelin,Indavong Vongsavady,Philippe Magarshack +20 more
TL;DR: The implementation details and silicon results of a 3 GHz dual-core ARM Cortex TM -A9 (A9) manufactured in the 28 nm planar Ultra-Thin Box and Body Fully-Depleted CMOS (UTBB FD-SOI) technology are presented.
Journal ArticleDOI
Cryogenic Temperature Characterization of a 28-nm FD-SOI Dedicated Structure for Advanced CMOS and Quantum Technologies Co-Integration
Philippe Galy,J. Camirand Lemyre,P. Lemieux,Franck Arnaud,Dominique Drouin,Michel Pioro-Ladrière +5 more
TL;DR: In this article, an nMOS quantum-dot dedicated structure was built in thin silicon film fabricated with 28 nm high- $k$ metal gate ultra-thin body and ultra thin buried oxide advanced CMOS technology.
Proceedings ArticleDOI
Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology
P. Flatresse,Bastien Giraud,Jean-Philippe Noel,Bertrand Pelloux-Prayer,Franck Giner,D. Arora,Franck Arnaud,Nicolas Planes,J. Le Coz,Olivier P. Thomas,Sylvain Engels,Giorgio Cesana,Robin Wilson,Pascal Urard +13 more
TL;DR: This paper presents an IEEE 802.11n Low-Density Parity-Check (LDPC) decoder implemented in 28nm Ultra-Thin Body and BOX Fully Depleted SOI (UTBB FDSOI), and introduces extended body bias (BB) design techniques to take advantage of specific features of the UTBB technology to overcome the +/-300mV BB range limitation of conventional bulk technologies.