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Andrea Bandiziol

Researcher at Infineon Technologies

Publications -  15
Citations -  174

Andrea Bandiziol is an academic researcher from Infineon Technologies. The author has contributed to research in topics: Equalization (audio) & Transmitter. The author has an hindex of 5, co-authored 14 publications receiving 111 citations. Previous affiliations of Andrea Bandiziol include University of Udine.

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Journal ArticleDOI

A TCAD-Based Methodology to Model the Site-Binding Charge at ISFET/Electrolyte Interfaces

TL;DR: The usefulness of the method is demonstrated by performing, for the first time in a commercial TCAD environment, a full 2-D analysis of ISFET operation, and a comparison between threshold voltage and drain current differential sensitivities in the linear and saturation regimes.
Journal ArticleDOI

A CMOS Pixelated Nanocapacitor Biosensor Platform for High-Frequency Impedance Spectroscopy and Imaging

TL;DR: The ability of the chip to reach high upper frequency of operation is demonstrated, thus overcoming the low-frequency Debye screening limit at nearly physiological salt concentrations in the electrolyte, and allowing for detection of events occurring beyond the extent of the electrical double layer.
Proceedings ArticleDOI

Sub-mW multi-Gbps chip-to-chip communication Links for Ultra-Low Power IoT end-nodes

TL;DR: The physical layer of a high-speed serial interface for chip-to-chip communication, targeting low cost and ultra-low power IoT end-nodes, is reported, designed to tolerate significant clock jitter and minimize area and power of supporting circuitry.
Proceedings ArticleDOI

Design of a 8-taps, 10Gbps transmitter for automotive micro-controllers

TL;DR: The proposed transmitter features feed-forward equalization with 8 taps, whose strength is programmable with 16 discretization steps, optimizing the transmitter adaptability with reduced area and achieves a remarkably low 2.25 pJ/bit total power consumption.
Journal ArticleDOI

A Simple Simulation Approach for the Estimation of Convergence and Performance of Fully Adaptive Equalization in High-Speed Serial Interfaces

TL;DR: A novel approach to simulate the convergence and the performance of high-speed serial interfaces with adaptive equalization that uses as input the pulse response of the channel that is then modified by adaptive techniques implementing feed-forward, decision-feedback, and linear-continuous time equalization.