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Charles J. Alpert
Researcher at IBM
Publications - 224
Citations - 8576
Charles J. Alpert is an academic researcher from IBM. The author has contributed to research in topics: Routing (electronic design automation) & Timing closure. The author has an hindex of 49, co-authored 224 publications receiving 8287 citations. Previous affiliations of Charles J. Alpert include Cadence Design Systems & University of Minnesota.
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Journal ArticleDOI
Recent directions in netlist partitioning: a survey
TL;DR: This survey describes research directions in netlist partitioning during the past two decades in terms of both problem formulations and solution approaches, and discusses methods which combine clustering with existing algorithms (e.g., two-phase partitioning).
Proceedings ArticleDOI
The ISPD98 circuit benchmark suite
TL;DR: The ISPD98 benchmark suite is introduced which consists of 18 circuits with sizes ranging from 13,000 to 210,000 modules and Experimental results for three existing partitioners are presented so that future researchers in partitioning can more easily evaluate their heuristics.
Journal ArticleDOI
A clock distribution network for microprocessors
Phillip J. Restle,Timothy G. McNamara,David A. Webber,Peter J. Camporese,K.F. Eng,Keith A. Jenkins,D.H. Allen,M.J. Rohn,M.P. Quaranta,David William Boerstler,Charles J. Alpert,C.A. Carter,R.N. Bailey,J.G. Petrovick,Byron L. Krauter,Bradley McCredie +15 more
TL;DR: A global clock distribution strategy implemented on several microprocessor chips is described, which consists of buffered, tunable tree networks, with the final trees all driving a common grid.
Proceedings ArticleDOI
Spectral Partitioning: The More Eigenvectors, The Better
Charles J. Alpert,So-Zen Yao +1 more
TL;DR: This work maps each graph vertex to a vector in d-dimensional space, where d is the number of eigenvectors, such that these vectors constitute an instance of the vector partitioning problem.
Proceedings ArticleDOI
Wire segmenting for improved buffer insertion
Charles J. Alpert,Anirudh Devgan +1 more
TL;DR: Weshow that using wire segmenting as a precursor to buffer insertion produces solutions within a few percent of optimal, while using only seconds of CPU time is shown.