An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Lasing is experimentally demonstrated in a direct bandgap GeSn alloy, grown directly onto Si(001). The authors observe a clear lasing threshold as well as linewidth narrowing at low temperatures.

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Lasing in direct-bandgap GeSn alloy grown on Si

Process gas discharged from a bypass pipe to a gas exhaust system can be prevented from diffusing back to the inside of a process chamber without having to install a dedicated vacuum pump at the downstream side of the bypass pipe. The substrate processing apparatus includes a process chamber accommodating a substrate, a gas supply system supplying process gas from a process gas source to the process chamber for processing the substrate, a gas exhaust system configured to exhaust the process chamber, two or more vacuum pumps installed in series at the gas exhaust system, and a bypass pipe connected between the gas supply system and the gas exhaust system. The most upstream one of the vacuum pumps is a mechanical booster pump, and the bypass pipe is connected between the mechanical booster pump and the rest vacuum pumps located at a downstream side of the mechanical booster pump.

Substrate Processing Apparatus

Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a channel region in a workpiece, and forming a source or drain region proximate the channel region. The source or drain region includes a contact resistance-lowering material layer comprising SiP, SiAs, or a silicide. The source or drain region also includes a channel-stressing material layer comprising SiCP or SiCAs.

Semiconductor Devices and Methods of Manufacture Thereof

Embodiments of the invention generally provide a method for depositing films or layers using a UV source during a photoexcitation process. The films are deposited on a substrate and usually contain a material, such as silicon (e.g., epitaxy, crystalline, microcrystalline, polysilicon, or amorphous), silicon oxide, silicon nitride, silicon oxynitride, or other silicon-containing materials. The photoexcitation process may expose the substrate and/or gases to an energy beam or flux prior to, during, or subsequent a deposition process. Therefore, the photoexcitation process may be used to pre-treat or post-treat the substrate or material, to deposit the silicon-containing material, and to enhance chamber cleaning processes. Attributes of the method that are enhanced by the UV photoexcitation process include removing native oxides prior to deposition, removing volatiles from deposited films, increasing surface energy of the deposited films, increasing the excitation energy of precursors, reducing deposition time, and reducing deposition temperature.

Method for forming silicon-containing materials during a photoexcitation deposition process

The present disclosure generally relate to methods for forming an epitaxial layer on a semiconductor device, including a method of forming a tensile-stressed germanium arsenic layer. The method includes heating a substrate disposed within a processing chamber, wherein the substrate comprises silicon, and exposing a surface of the substrate to a germanium-containing gas and an arsenic-containing gas to form a germanium arsenic alloy having an arsenic concentration of 4.5x1020 atoms per cubic centimeter or greater on the surface.

New materials for tensile stress and low contact resistance and method of forming

Metal organic chemical vapor deposition of GaAs, InGaAs, and AlGaAs on nominal 300 mm Si(100) at temperatures below 550 °C was studied using the selective aspect ratio trapping method. We clearly show that growing directly GaAs on a flat Si surface in a SiO2 cavity with an aspect ratio as low as 1.3 is efficient to completely annihilate the anti-phase boundary domains. InGaAs quantum wells were grown on a GaAs buffer and exhibit room temperature micro-photoluminescence. Cathodoluminescence reveals the presence of dark spots which could be associated with the presence of emerging dislocation in a direction parallel to the cavity. The InGaAs layers obtained with no antiphase boundaries are perfect candidates for being integrated as channels in n-type metal oxide semiconductor field effect transistor (MOSFET), while the low temperatures used allow the co-integration of p-type MOSFET.

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Low defect InGaAs quantum well selectively grown by metal organic chemical vapor deposition on Si(100) 300 mm wafers for next generation non planar devices

High quality GaAs is selectively grown in 40 nm width Shallow Trench Isolation patterned structures. The patterned wafers have a V-shape Si (111) surface obtained by Tetramethylammonium hydroxide etching. By employing a SiCoNi™ pre-epi clean and two-step growth procedure (low temperature buffer and high temperature main layer), defects are effectively confined at the trench bottom, leaving a dislocation-free GaAs layer at the upper part. The high crystal quality is confirmed by transmission electron microscopy. Scanning spreading resistance microscopy indicates a high resistance of GaAs. The process conditions and GaAs material quality are highly compatible with Si technology platform.

Selective metal-organic chemical vapor deposition growth of high quality GaAs on Si(001)

We have studied silicon nitride thin films deposited by hot-wire chemical vapor deposition as a function of the substrate temperature and hydrogen dilution. We found that adding H2 to the process significantly enhances silicon nitride film deposition. High-quality films can be grown at low substrate temperatures (<350 °C). At optimized conditions, a 500-A-thick silicon nitride film gives a nearly 100% surface coverage on a 100 nm scale object. H dilution dramatically increases the NH2 radicals in the process and leads to conformal films.

Conformal thin-film silicon nitride deposited by hot-wire chemical vapor deposition

The integration of III-V on silicon is still a hot topic as it will open up a way to co-integrate Si CMOS logic with photonic devices. To reach this aim, several hurdles should be solved, and more particularly the generation of antiphase boundaries (APBs) at the III-V/Si(001) interface. Density functional theory (DFT) has been used to demonstrate the existence of a double-layer steps on nominal Si(001) which is formed during annealing under proper hydrogen chemical potential. This phenomenon could be explained by the formation of dimer vacancy lines which could be responsible for the preferential and selective etching of one type of step leading to the double step surface creation. To check this hypothesis, different experiments have been carried in an industrial 300 mm metalorganic chemical vapor deposition where the total pressure during the annealing step of Si(001) surface has been varied. Under optimized conditions, an APBs-free GaAs layer was grown on a nominal Si(001) surface paving the way for III...

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Errol Antonio C. Sanchez

Papers

New materials for tensile stress and low contact resistance and method of forming

Low defect InGaAs quantum well selectively grown by metal organic chemical vapor deposition on Si(100) 300 mm wafers for next generation non planar devices

Selective metal-organic chemical vapor deposition growth of high quality GaAs on Si(001)

Conformal thin-film silicon nitride deposited by hot-wire chemical vapor deposition

Toward the III–V/Si co-integration by controlling the biatomic steps on hydrogenated Si(001)