Hanpei Koike

TL;DR: In this paper, a comprehensive study on the controllability of four-terminal-driven double-gate (DG) MOSFETs with independently switched DGs is presented.

TL;DR: A novel methodology for FinFET-based keeper design is introduced, which exploits the exclusive property ofFinFET devices (capacitive coupling between the front gate and the back gate in a four-terminal FinFet) to simultaneously achieve higher performance and lower power consumption.

TL;DR: In this article, the threshold voltage during the operation of a transient response thereof is enabled to be arbitrarily and accurately controlled by a method that includes applying a first input signal intended to perform an ordinary logic operation to one of the gate electrodes thereof and applying, in response to this signal, a second signal that has a signal-level temporal-change direction as the first signal and has at least one of low level and high level thereof shifted by a predetermined magnitude or endowed with a predetermined time difference or has the time slower or faster signal level change of the signal to the other gate electrode.

TL;DR: In this article, the Vth variation of the MG FinFETs was analyzed into structure-based (TSi, LG) and material-based variations for the first time, and the extracted variations were incorporated into the compact model.

TL;DR: A new method for improving the timing yield of field-programmable gate array (FPGA) devices affected by random within-die variation is proposed, which does not require the measurement of process variations and execution of design tools for each chip.