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Takashi Matsukawa

Researcher at National Institute of Advanced Industrial Science and Technology

Publications -  295
Citations -  3019

Takashi Matsukawa is an academic researcher from National Institute of Advanced Industrial Science and Technology. The author has contributed to research in topics: MOSFET & Field-effect transistor. The author has an hindex of 25, co-authored 295 publications receiving 2759 citations. Previous affiliations of Takashi Matsukawa include University of Tsukuba & Meiji University.

Papers
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Journal ArticleDOI

Demonstration, analysis, and device design considerations for independent DG MOSFETs

TL;DR: In this paper, a comprehensive study on the controllability of four-terminal-driven double-gate (DG) MOSFETs with independently switched DGs is presented.
Journal ArticleDOI

Ultra-compact 8 × 8 strictly-non-blocking Si-wire PILOSS switch

TL;DR: A path-independent insertion-loss (PILOSS) 8 × 8 matrix switch based on Si-wire waveguides, which has a record-small footprint and demonstrates successful switching of digital-coherent 43-Gbps QPSK signal.
Proceedings Article

Comprehensive analysis of variability sources of FinFET characteristics

TL;DR: In this paper, the influence of channel doping, fluctuation of gate length and fin thickness on the performance of undoped/doped channels with various gate materials was comprehensively investigated for SRAM.
Journal ArticleDOI

Investigation of the TiN Gate Electrode With Tunable Work Function and Its Application for FinFET Fabrication

TL;DR: In this article, a conformal TiN deposition on the sidewalls of upstanding Si-fin channels of FinFETs by using a conventional reactive sputtering has been demonstrated, where the work function of the TiN (phiTiN) slightly decreases with increasing nitrogen (N2) gas flow ratio, from 17% to 100%.
Journal ArticleDOI

Ultrathin channel vertical DG MOSFET fabricated by using ion-bombardment-retarded etching

TL;DR: In this paper, a vertical ultrathin channel formation process for a vertical type double-gate (DG) MOSFET was proposed, where the ion-bombardment-retarded etching (IBRE) was used to reduce the channel thickness.