Hyung-Kyu Kim

TL;DR: This paper presents a 16Gb 18Gb/s/pin GDDR6 DRAM with a die architecture and high-speed circuit techniques on 1.35V DRAM process and introduces a dual channel for a data granularity of 32B with a BL16, per-bit training of l/REF, and an equalizer with PLL-less clocking.

TL;DR: A 2Gb LPDDR4 SDRAM with 0.15mW standby mode power is presented, which is 66% lower than the standby power for a memory of the same density and achieves a bandwidth of 3.733Gb/s/pin.

TL;DR: The hollow BaFe12O19 submicron spheres (HBSSs) for advanced functional magnetic materials were synthesized successfully by self assembly method using diethyleneamine (DEA) as mentioned in this paper.

TL;DR: In this paper, the authors suggest a source underlap structure with short channel transistor to solve the negative bias temperature instability problem and confirm that the short-channel device with underlap structures shows improved NBTI characteristics compared to normal long-channel devices through a device simulation.