There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here.

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The 2018 GaN power electronics roadmap

Journal of Applied physics,Vol.33 : 1962年に発表されたレオロジー関連の論文

Semiconductor Power Devices

Recent success with the fabrication of high-performance GaN-on-Si high-voltage HFETs has made this technology a contender for power electronic applications. This paper discusses the properties of GaN that make it an attractive alternative to established silicon and emerging SiC power devices. Progress in development of vertical power devices from bulk GaN is reviewed followed by analysis of the prospects for GaN-on-Si HFET structures. Challenges and innovative solutions to creating enhancement-mode power switches are reviewed.

https://iopscience.iop.org/article/10.1088/0268-1242/28/7/074011/pdf

Gallium nitride devices for power electronic applications

In this paper, we present self-consistent electrothermal simulations of single-finger and multifinger GaN vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) and lateral AlGaN/GaN high-electron-mobility transistors (HEMTs) and compare their thermal performance. The models are first validated by comparison with experimental dc characteristics, and then used to study the maximum achievable power density of the device without the peak temperature exceeding a safe operation limit of 150°C (P150°C). It is found that the vertical MOSFETs have the potential to achieve a higher P150°C than the lateral HEMTs, especially for higher breakdown voltages and higher scaling level designs.

Electrothermal Simulation and Thermal Performance Study of GaN Vertical and Lateral Power Transistors

This letter reports undoped AlGaN/GaN high-electron-mobility transistors (HEMTs) fabricated with a Si-CMOS-compatible technology based on Ti/Al/W ohmic and Schottky contacts. The use of ohmic recess is key to reduce the contact resistance of this Au-free metallization below 0.5 Ω·mm. Comparison of HEMTs fabricated on the same wafer with and without ohmic recess shows that the recess provides a tenfold reduction in contact resistance, resulting in a fivefold lower forward voltage drop at IDS = 100 mA/mm. The reported Au-free AlGaN/GaN HEMT fabrication technology provides similar performance (i.e., contact resistance, leakage current, and breakdown voltage) than state-of-the-art Au-based AlGaN/GaN HEMTs and can be used in standard Si fabs without the risk of contamination.

AlGaN/GaN High-Electron-Mobility Transistors Fabricated Through a Au-Free Technology

This letter reports the fabrication of InAlN/GaN high-electron mobility transistors (HEMTs) with a three-terminal off-state breakdown voltage (BV) of 3000 V and a low specific on-resistance of 4.25 mΩ·cm2. To reduce the drain-to-source leakage current in these devices, an AlGaN back barrier has been used. The gate leakage current in these devices is in the ~10-10 A/mm range owing to the use of a SiO2 gate dielectric. This current level is more than six orders of magnitude lower than in Schottky-barrier HEMTs. The combination of an AlGaN back barrier, the high charge sheet density of InAlN/GaN HEMTs, and the low leakage due to the gate-dielectric layer allows for a figure-of-merit BV2/RON,SP of ~2.1 × 109 V2·Ω-1·cm-2.

3000-V 4.3- $\hbox{m}\Omega \cdot \hbox{cm}^{2}$ InAlN/GaN MOSHEMTs With AlGaN Back Barrier

GaN high electron mobility transistors (HEMTs) were monolithically integrated with silicon CMOS to create a functional current mirror circuit. The integrated circuit was fabricated on 100 mm diameter modified silicon-on-insulator (SOI) wafers incorporating a resistive (111) silicon handle substrate and a lightly doped (100) silicon device layer. In a CMOS-first process, the CMOS was fabricated using the (100) device layer. Subsequently GaN was grown by plasma molecular beam epitaxy in windows on the (111) handle substrate surface without wire growth despite using gallium-rich growth conditions. Transmission lines fabricated on the GaN buffer/SOI wafer exhibited a microwave loss of less than 0.2 dB/mm up to 35 GHz. Direct current measurements on GaN HEMTs yielded a current density of 1.0 A/mm and transconductance of 270 mS/mm. At 10 GHz and a drain bias of 28 V, 1.25 mm long transistors demonstrated a small signal gain of 10.7 dB and a maximum power added efficiency of 53% with a concomitant power of 5.6 W...

Monolithic integration of silicon CMOS and GaN transistors in a current mirror circuit

This paper reports the fabrication of epitaxial 4H-SiC bipolar junction transistors (BJTs) with a maximum current gain /spl beta/=64 and a breakdown voltage of 1100 V. The high /spl beta/ value is attributed to high material quality obtained after a continuous epitaxial growth of the base-emitter junction. The BJTs show a clear emitter-size effect indicating that surface recombination has a significant influence on /spl beta/. A minimum distance of 2-3 /spl mu/m between the emitter edge and base contact implant was found adequate to avoid a substantial /spl beta/ reduction.

Hyung-Seok Lee

Papers

Electrothermal Simulation and Thermal Performance Study of GaN Vertical and Lateral Power Transistors

AlGaN/GaN High-Electron-Mobility Transistors Fabricated Through a Au-Free Technology

3000-V 4.3- $\hbox{m}\Omega \cdot \hbox{cm}^{2}$ InAlN/GaN MOSHEMTs With AlGaN Back Barrier

Monolithic integration of silicon CMOS and GaN transistors in a current mirror circuit

Geometrical effects in high current gain 1100-V 4H-SiC BJTs