J
J. H. Lee
Researcher at Samsung
Publications - 25
Citations - 884
J. H. Lee is an academic researcher from Samsung. The author has contributed to research in topics: Layer (electronics) & Flash memory. The author has an hindex of 11, co-authored 22 publications receiving 717 citations.
Papers
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Proceedings ArticleDOI
The breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond
Joonsuk Kim,Chang-Sub Lee,S. Kim,I.B. Chung,Yong-lack Choi,Byung-lyul Park,J.W. Lee,D.I. Kim,Young-Nam Hwang,D.S. Hwang,H.K. Hwang,Jong Moon Park,D.H. Kim,N.J. Kang,Mann Ho Cho,Myung Yung Jeong,Hoonki Kim,Jung-In Han,S.Y. Kim,Byeong Yun Nam,Hyun-Mog Park,S.H. Chung,J. H. Lee,Jintaek Park,H.S. Kim,Yang-Keun Park,K. Kim +26 more
TL;DR: In this paper, a Recess-Channel-Array-Transistor (RCAT) with 88 nm feature size has been developed for DRAM with a gate length of 75 nm and channel depth of 150 nm.
Proceedings ArticleDOI
3nm GAA Technology featuring Multi-Bridge-Channel FET for Low Power and High Performance Applications
Geum-Jong Bae,Dong-il Bae,Myung-Gil Kang,S.M. Hwang,Sang-Su Kim,Bum-seok Seo,Tae-Ouk Kwon,Taejung Lee,Chang-Rok Moon,Yujung Choi,K. Oikawa,S. Masuoka,K.Y. Chun,Sungho Park,Hong Jae Shin,Jongchol Kim,Krishna Kumar Bhuwalka,Dae Hyun Kim,Won-Woong Kim,Jong-ryeol Yoo,Hee-Kyung Jeon,M.S. Yang,Suk-Jin Chung,D.I. Kim,B.H. Ham,K.J. Park,Wandong Kim,G. Song,Yohan Kim,M.S. Kang,Ki-Hyun Hwang,Chang-Hyun Park,J. H. Lee,Dong-Won Kim,S-M. Jung,H. K. Kang +35 more
TL;DR: In this paper, a gate-all-around multi-bridge-channel MOSFET (MBCFET) technology is successfully demonstrated including a fully working high density SRAM.
Proceedings ArticleDOI
Stack friendly all-oxide 3D RRAM using GaInZnO peripheral TFT realized over glass substrates
Myoung-Jae Lee,Chang Bum Lee,S. Kim,Huaxiang Yin,J.M. Park,Seung-Eon Ahn,Bo Soo Kang,Ki-chul Kim,G. Stefanovich,I-hun Song,Shin-Deuk Kim,J. H. Lee,Suk-Jin Chung,Yohan Kim,Chang-Sub Lee,Jong-Man Park,In-Gyu Baek,Chang Jung Kim,Yun Daniel Park +18 more
TL;DR: In this article, a GaInZnO (GIZO) thin film transistors (TFTs) integrated with 1D-1R (NiO) (one diode-one resistor) structure oxide memory node element is presented.
Proceedings ArticleDOI
Highly functional and reliable 8Mb STT-MRAM embedded in 28nm logic
Yoon-Jong Song,J. H. Lee,H. C. Shin,Ki-Don Lee,Kwang-Pyuk Suh,J R Kang,S. S. Pyo,H. T. Jung,Sun-Kyu Hwang,Gwan-Hyeob Koh,Se-hoon Oh,Seong-Geon Park,Jong-Han Kim,Jong-Il Park,Jung-hyeon Kim,Ki-Hyun Hwang,Gitae Jeong,Kwan-Heum Lee,E. S. Jung +18 more
TL;DR: Wang et al. as discussed by the authors fabricated 8Mb 1T-1MTJ STT-MRAM macro embedded in 28nm CMOS logic platform by developing novel integration/stack/patterning technologies.
Proceedings ArticleDOI
1Gbit High Density Embedded STT-MRAM in 28nm FDSOI Technology
Kwan-Heum Lee,Won-Woong Kim,J. H. Lee,Byoung-Jae Bae,J.H. Park,I. H. Kim,Bum-seok Seo,Sung-hee Han,Y. Ji,H. T. Jung,Seong-Geon Park,J. H. Bak,O. I. Kwon,J. W. Kye,Yihwan Kim,Sangwoo Pae,Yoon-Jong Song,Gitae Jeong,Ki-Hyun Hwang,Gwan-Hyeob Koh,H. K. Kang,E. S. Jung,Yong-Jae Kim,Chan-kyung Kim,Artur Antonyan,D. H. Chang,Sun-Kyu Hwang,G. W. Lee,N. Y. Ji +28 more
TL;DR: In this paper, a high density 1Gb embedded STT-MRAM in 28nm FDSOI technology was successfully demonstrated, which was mainly attributed to the advanced process for better control of MTJ CD, highly manufacturable process window and robust circuit design for high density chip.