J.M. Knecht

TL;DR: In this paper, the authors describe the rationale and development of a wafer-scale three-dimensional (3D) integrated circuit technology and the essential elements of the 3D technology are integrated circuit fabrication on silicon-on-insulator wafers, precision waferwafer alignment using an in-house developed alignment system, low-temperature wafer wafer bonding to transfer and stack active circuit layers, and interconnection of the circuit layers with dense-vertical connections with sub-Omega 3-D via resistances.

TL;DR: In this article, a 1024/spl times/1024 integrated image sensor with 8 /spl mu/m pixels, developed with 3D fabrication in 150 mm wafer technology, is presented.

TL;DR: In this paper, the performance of a new microelectromechanical structure (MEMS) cantilever microswitch was reported for both dc-and capacitively-contacted microswitches.

TL;DR: A 64times64 laser-radar (ladar) detector array with 50mum pixel size measures the arrival times of single photons using Geiger-mode avalanche photodiodes (APD).

TL;DR: In this article, a noncontact and nondestructive laser-based acoustic technique called impulsive stimulated thermal scattering (ISTS) is used to measure thicknesses of metal films including Cu, Ta, W, Al, Ti, and others in single-layer and multilayer assemblies on silicon substrates.