J
Jin He
Researcher at Wuhan University
Publications - 455
Citations - 4612
Jin He is an academic researcher from Wuhan University. The author has contributed to research in topics: MOSFET & Field-effect transistor. The author has an hindex of 26, co-authored 415 publications receiving 3695 citations. Previous affiliations of Jin He include Nanyang Technological University & Nantong University.
Papers
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Journal ArticleDOI
Highly Efficient Flexible Perovskite Solar Cells with Antireflection and Self-Cleaning Nanostructures.
Mohammad Mahdi Tavakoli,Kwong Hoi Tsui,Qianpeng Zhang,Jin He,Yan Yao,Dongdong Li,Zhiyong Fan +6 more
TL;DR: It was found that the fabricated flexible perovskite solar cells have reasonable bendability, with 96% of the initial value remaining after 200 bending cycles, and the power conversion efficiency was improved from 12.06 to 13.14% by using the antireflection film, which also demonstrated excellent superhydrophobicity.
Journal ArticleDOI
Fabrication of efficient planar perovskite solar cells using a one-step chemical vapor deposition method
Mohammad Mahdi Tavakoli,Leilei Gu,Yuan Gao,Claas J. Reckmeier,Jin He,Andrey L. Rogach,Yan Yao,Zhiyong Fan +7 more
TL;DR: This is the first demonstration of a highly efficient perovskite solar cell using one step CVD and there is likely room for significant improvement of device efficiency.
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A Junctionless Nanowire Transistor With a Dual-Material Gate
TL;DR: In this paper, a dual-material-gate junctionless nanowire transistor (DMG-JNT) was proposed and compared with a generic single-material gate JNT using 3D numerical simulations.
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Real-Time Multilead Convolutional Neural Network for Myocardial Infarction Detection
TL;DR: A novel algorithm based on a convolutional neural network (CNN) is proposed for myocardial infarction detection via multilead electrocardiogram (ECG) via beat segmentation algorithm utilizing multileads, and fuzzy information granulation is adopted for preprocessing.
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Vertically Stacked Silicon Nanowire Transistors Fabricated by Inductive Plasma Etching and Stress-Limited Oxidation
TL;DR: In this paper, a simple top-down method for realizing an array of vertically stacked nanowires is presented, which utilizes the nonuniformity in inductively coupled plasma (ICP) etching to form a scallop pattern at the sidewall of a tall silicon ridge.