J
John J. Garant
Researcher at IBM
Publications - 29
Citations - 197
John J. Garant is an academic researcher from IBM. The author has contributed to research in topics: Wafer & Layer (electronics). The author has an hindex of 7, co-authored 29 publications receiving 175 citations. Previous affiliations of John J. Garant include GlobalFoundries.
Papers
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Proceedings ArticleDOI
50μm pitch Pb-free micro-bumps by C4NP technology
Bing Dang,Da-Yuan Shih,Stephen L. Buchwalter,Cornelia K. Tsang,Chirag S. Patel,John U. Knickerbocker,Peter A. Gruber,Sarah H. Knickerbocker,John J. Garant,Krystyna W. Semkow,K. Ruhmer,E. Hughlett +11 more
TL;DR: In this article, the extendibility of C4NP technology to ultra fine pitch applications has been explored, where reusable C4PN glass molds were fabricated and characterized for 50 mum pitch application.
Proceedings ArticleDOI
C4NP technology: Manufacturability, yields and reliability
Eric D. Perfecto,D. Hawken,Hai P. Longworth,Harry D. Cox,Kamalesh K. Srivastava,Valerie Oberson,J. Shah,John J. Garant +7 more
TL;DR: The controlled collapsed chip connection new process (C4NP) has moved, over the last 2 years, from development into manufacturing for 300 mm wafers, with Suss MicroTech Inc as the equipment partner.
Proceedings ArticleDOI
Face to Face Hybrid Wafer Bonding for Fine Pitch Applications
Daniel Fisher,Sarah H. Knickerbocker,Daniel Smith,Robert Katz,John J. Garant,Jorge Lubguban,Vilmarie Soler,Norman Robson +7 more
TL;DR: In this article, the authors demonstrate face-to-face hybrid wafer bonding at GLOBALFOUNDRIES, including fine pitch characterization and processing, along with preliminary reliability results.
Proceedings ArticleDOI
Prototype of multi-stacked memory wafers using low-temperature oxide bonding and ultra-fine-dimension copper through-silicon via interconnects
Wei Lin,Johnathan E. Faltermeier,Kevin R. Winstel,Spyridon Skordas,Troy L. Graves-Abe,Pooja R. Batra,Kenneth Robert Herman,John W. Golz,Toshiaki Kirihata,John J. Garant,Alex Hubbard,Kris Cauffman,Theodore Levine,James J. Kelly,Deepika Priyadarshini,B. Peethala,Raghuveer R. Patlolla,Matthew T. Shoudy,James J. Demarest,Jean E. Wynne,Donald F. Canaperi,D. McHerron,Daniel Berger,Subramanian S. Iyer +23 more
TL;DR: In this article, a proof-of-concept multi-stacking of memory wafers based on low-temperature oxide wafer bonding using novel design and integration of two types of ultra-fine-dimension copper TSV interconnects is reported.
Proceedings ArticleDOI
A high-density logic-on-logic 3DIC design using face-to-face hybrid wafer-bonding on 12nm FinFET process
Saurabh Sinha,S. Hung,Daniel Fisher,Xiaoqing Xu,C. Chao,Pranavi Chandupatla,F. Frederick,H. Perry,Daniel Smith,Alberto Cestero,John M. Safran,V. Ayyavu,Mudit Bhargava,Rahul Mathur,D. Prasad,Robert Katz,A. Kinsbruner,John J. Garant,Jorge Lubguban,Sarah H. Knickerbocker,V. Soler,Brian Cline,R. Christy,T. McLaurin,Norman Robson,Daniel Berger +25 more
TL;DR: In this article, a high-density 3D test-vehicle with synchronous cache coherent mesh interconnect design (Arm Neoverse® CMN-600) operational at frequencies up to 2.4 GHz and partitioned in 3D using 5.76µm pitch face-to-face wafer-bond 3D connections is presented.