J
Joo Yun Seo
Researcher at Seoul National University
Publications - 19
Citations - 393
Joo Yun Seo is an academic researcher from Seoul National University. The author has contributed to research in topics: Charge trap flash & NAND gate. The author has an hindex of 7, co-authored 19 publications receiving 371 citations. Previous affiliations of Joo Yun Seo include Samsung.
Papers
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Journal ArticleDOI
Three-Dimensional nand Flash Architecture Design Based on Single-Crystalline STacked ARray
Yoon Kim,Jang-Gn Yun,Se Hwan Park,Wandong Kim,Joo Yun Seo,Myounggon Kang,Kyung-Chang Ryoo,Jeong-Hoon Oh,Jong-Ho Lee,Hyungcheol Shin,Byung-Gook Park +10 more
TL;DR: Various critical issues related with 3-D stacked nand Flash memory are examined in this paper and for the first time the structure and operation methods of the “full” array are considered.
Journal ArticleDOI
Layer Selection by Multi-Level Permutation in 3-D Stacked NAND Flash Memory
Sang-Ho Lee,Wandong Kim,Daewoong Kwon,Joo Yun Seo,Myung Hyun Baek,Sung-Bok Lee,Jinkyu Kang,Woojae Jang,Jong-Ho Lee,Byung-Gook Park +9 more
TL;DR: It is clearly revealed that the number of selectable layer can be increased drastically by the LSMP, due to the increased number of threshold voltage orderings by the permutation.
Journal ArticleDOI
A New Programming Method to Alleviate the Program Speed Variation in Three-Dimensional Stacked Array NAND Flash Memory
TL;DR: A new programming method is proposed, and it is proposed that can alleviate the VT variation among cells and reduce the total programming time.
Journal ArticleDOI
Analysis on Program Disturbance in Channel-Stacked NAND Flash Memory With Layer Selection by Multilevel Operation
Daewoong Kwon,Wandong Kim,Do-Bin Kim,Sang-Ho Lee,Joo Yun Seo,Myung-Hyun Baek,Ji-Ho Park,Eun-Seok Choi,Gyu Seong Cho,Sung-Kye Park,Jong-Ho Lee,Byung-Gook Park +11 more
TL;DR: In this paper, a simplified channel-stacked array with layer selection by multilevel operation was analyzed in a simplified NAND array with a simplified layer selection method, after setting the threshold voltages of string select transistors (SSTs)/dummy SSTs.
Proceedings ArticleDOI
Channel-stacked NAND flash memory with layer selection by multi-level operation (LSM)
Wandong Kim,Joo Yun Seo,Yoon Kim,Se Hwan Park,Sang-Ho Lee,Myung Hyun Baek,Jong-Ho Lee,Byung-Gook Park +7 more
TL;DR: The proposed CSTAR with LSM has no island-type SSLs, and as a result of the advantages of the proposed architecture, various issues of conventional channel stacked NAND flash memory array can be solved.