J
Jun Luo
Researcher at Chinese Academy of Sciences
Publications - 251
Citations - 1869
Jun Luo is an academic researcher from Chinese Academy of Sciences. The author has contributed to research in topics: Layer (electronics) & Schottky barrier. The author has an hindex of 20, co-authored 206 publications receiving 1398 citations. Previous affiliations of Jun Luo include Xiamen University & Shandong University.
Papers
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Journal ArticleDOI
Structural stability and magnetic properties of SmCo7−xGax
TL;DR: In this article, the structural stability and magnetic properties of SmCo7−xGax compounds using powder x-ray diffraction and magnetic measurements were studied using Ga atom occupation.
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Spin Logic Devices via Electric Field Controlled Magnetization Reversal by Spin-Orbit Torque
Meiyin Yang,Yongcheng Deng,Zhenhua Wu,Kaiming Cai,K. W. Edmonds,Yucai Li,Yu Sheng,Sumei Wang,Cui Yan,Jun Luo,Yang Ji,Houzhi Zheng,Kaiyou Wang +12 more
TL;DR: In this article, a spin logic device with controllable magnetization switching of perpendicularly magnetized ferromagnet/heavy metal structures on a ferroelectric (1- ${x}$ ) [Pb(Mg1/3Nb2/3)O3]- x PbTiO3] (PMN-PT) substrate using current-induced spin-orbit torque.
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Mobility Enhancement Technology for Scaling of CMOS Devices: Overview and Status
TL;DR: The aggressive downscaling of complementary metal–oxide–semiconductor (CMOS) technology to the sub-21-nm technology node is facing great challenges, and innovative technologies such as metal gate/high-k dielectric integration, source/drain engineering, mobility enhancement technology, new device architectures, and enhanced quasiballistic transport channels serve as possible solutions for nanoscaled CMOS.
Journal ArticleDOI
Surface-energy triggered phase formation and epitaxy in nanometer-thick Ni1−xPtx silicide films
Jun Luo,Zhi-Jun Qiu,Chaolin Zha,Zhen Zhang,Dongping Wu,Jun Lu,Johan Åkerman,Mikael Östling,Lars Hultman,Shi-Li Zhang +9 more
TL;DR: In this article, the formation of ultrathin silicide films of Ni1-xPtx at 450-850 degrees C was reported and polycrystalline NiSi films formed and agglomerated at lower temperatures.
Patent
Transistor with primary and semiconductor spacer, method for manufacturing transistor, and semiconductor chip comprising the transistor
TL;DR: In this paper, the transistor is described as an active area, a gate stack, a primary spacer, and source/drain regions, where the source/drains are embedded in the active area and self-aligned with opposite sides of the primary Spacer.