Silicon-Germanium (SiGe) technology effectively merges the desirable attributes of conventional silicon-based CMOS manufacturing (high integration levels, at high yield and low cost) with the extreme levels of transistor performance attainable in classical III-V heterojunction bipolar transistors (HBTs). SiGe technology joins together on-die high-speed bandgap-engineered SiGe HBTs with conventional Si CMOS to form SiGe BiCMOS technology, including all the requisite RF passive elements and multi-level thick-Al metalization required for high-speed circuit design. Such an silicon-based integrated circuit technology platform presents designers with an ideal division of labor for realizing optimal solutions to many performance-constrained mixed-signal (analog + digital + RF) systems. The unique bandgap-engineered features of SiGe HBTs enable several key merits with respect to operation across a wide variety of so-called “extreme environments”, potentially with little or no process modification, ultimately providing compelling advantages at the circuit and system level, across a wide class of envisioned commercial and defense applications. Here we give an overview of this interesting field, focusing primarily on the intersection of SiGe HBTs, and circuits built from them, with radiation-intense environments such as space.

Radiation Effects in SiGe Technology

Owing to its energy efficiency, silicon complementary metal–oxide–semiconductor (CMOS) technology is the current driving force of the integrated circuit industry. Silicon’s narrow bandgap has led to the advancement of wide-bandgap semiconductor materials, such as gallium nitride (GaN), being favoured in power electronics, radiofrequency power amplifiers and harsh environment applications. However, the development of GaN CMOS logic circuits has proved challenging because of the lack of a suitable strategy for integrating n-channel and p-channel field-effect transistors on a single substrate. Here we report the monolithic integration of enhancement-mode n-channel and p-channel GaN field-effect transistors and the fabrication of GaN-based complementary logic integrated circuits. We construct a family of elementary logic gates—including NOT, NAND, NOR and transmission gates—and show that the inverters exhibit rail-to-rail operation, suppressed static power dissipation, high thermal stability and large noise margins. We also demonstrate latch cells and ring oscillators comprising cascading logic inverters. Through the monolithic integration of enhancement-mode n-type and p-type gallium nitride field-effect transistors, complementary integrated circuits including latch circuits and ring oscillators can be created for use in high-power and high-frequency applications.

Gallium nitride-based complementary logic integrated circuits

Short-term demonstrations of packaged 4H-SiC junction field-effect transistor (JFET) logic integrated circuits (ICs) at temperatures exceeding 800 °C in air are reported, including a 26-transistor 11-stage ring oscillator that functioned at 961 °C ambient temperature believed unprecedented for electrical operation of a semiconductor IC. The expanded temperature range should assist temperature acceleration testing/qualification of such ICs intended for long-term use in applications near 500 °C ambient, and perhaps spawn new applications. Ceramic package assembly leakage currents inhibited the determination of some intrinsic SiC device/circuit performance properties at these extreme temperatures, so it is conceivable that even higher operating temperatures might be obtained from SiC JFET ICs by employing packaging and circuit design intended/optimized for T $\ge800$ °C.

Demonstration of 4H-SiC Digital Integrated Circuits Above 800 °C

SiC MOSFETs are a leading option for increasing the power density of power electronics; however, for these devices to supersede the Si insulated-gate bipolar transistor, their characteristics have to be further understood. Two SiC vertically oriented planar gate D-MOSFETs rated for 1200 V/150 A were repetitively subjected to pulsed overcurrent conditions to evaluate their failure mode due to this common source of electrical stress. This research supplements recent work that demonstrated the long term reliability of these same devices [1] . Using an RLC pulse-ring-down test bed, these devices hard-switched 600 A peak current pulses, corresponding to a current density of 1500 A/cm2. Throughout testing, static characteristics of the devices such as $B_{{\rm VDSS}}$ , $R_{{\rm DS}({\rm on})}$ , and $V_{{\rm GS}({\rm th})}$ were measured with a high power device analyzer. The experimental results indicated that a conductive path was formed through the gate oxide; TCAD simulations revealed localized heating at the SiC/SiO2 interface as a result of the extreme high current density present in the device's JFET region. However, the high peak currents and repetition rates required to produce the conductive path through the gate oxide demonstrate the robustness of SiC MOSFETs under the pulsed overcurrent conditions common in power electronic applications.

Failure Analysis of 1200-V/150-A SiC MOSFET Under Repetitive Pulsed Overcurrent Conditions

This paper is an important step toward the development of complex integrated circuit (IC) control electronics that have to attend to high-temperature environment power applications. We present in premiere a prototype set of essential mixed-signal ICs on SiC capable of controlling power switches and a lateral power MESFET able to operate at high temperatures, all embedded on the same chip. Also, we report for the first time the functionality of standard Si-CMOS topologies on SiC for the master–slave data flip-flop (FF) and data-reset FF digital building blocks designed with MESFETs. Concretely, we present the complete development of SiC-MESFET IC circuitry, able to integrate gate drivers for SiC power devices. This development is based on the mature and stable Tungsten–Schottky interface technology used for the fabrication of stable SiC Schottky diodes for the European Space Agency Mission BepiColombo.

SiC Integrated Circuit Control Electronics for High-Temperature Operation

The first SiC integrated circuit linear voltage regulator is reported. The voltage regulator uses a 20-V supply and generates an output of 15 V, adjustable down to 10 V. It was designed for loads of up to 2 A over a temperature range of 25-225 °C. It was, however, successfully tested up to 300 °C. The voltage regulator demonstrated load regulations of 1.49% and 9% for a 2-A load at temperatures of 25 and 300 °C, respectively. However, the load regulation is less than 2% up to 300 °C for a 1-A load. The line regulation with a 2-A load at 25 and 300 °C was 17 and 296 mV/V, respectively. The regulator was fabricated in a Cree 4H-SiC 2-μm experimental process and consists of 1000, 32/2-μm NMOS depletion MOSFETs as the pass device, an integrated error amplifier with enhancement MOSFETs, and resistor loads, and uses external feedback and compensation networks to ensure operational integrity. It was designed to be integrated with high-voltage vertical power MOSFETs on the same SiC substrate. It also serves as a guide to future attempts for voltage regulation in any type of integrated SiC circuitry.

A SiC CMOS Linear Voltage Regulator for High-Temperature Applications

With high-temperature power devices available, the support circuitry required for efficient operation, such as a gate driver, is needed as part of a complete high-temperature solution. The design of an integrated silicon carbide (SiC) gate driver using a 1.2-μm complementary metal–oxide–semiconductor (CMOS) process is presented. Adjustable drive strength is added to facilitate a minimal external component requirement for high-temperature power modules and lays the groundwork for dynamic adjustment of drive strength. The adjustable drive strength feature demonstrates a capability of reducing overshoot and controlling dv / dt dynamically. Measurement of the gate driver was performed driving a power mosfet gate over temperature, exceeding 500 °C. High-speed and high-voltage room temperature evaluation is provided, demonstrating a system capable of high performance over temperature. The driver accomplishes better than 75 ns of rise and fall time driving the Cree CPM3-0900-0065B from room temperature to over 500 °C indicating that it will be ideal for integration into an all-SiC power module where driver, protection circuits, and power devices are fabricated in SiC.

An Integrated SiC CMOS Gate Driver for Power Module Integration

In this work, the first reported integrated silicon carbide (SiC) CMOS gate driver is presented. The gate driver is designed in a 15V, 1.2 µm silicon carbide CMOS process, and simulated from 25 °C to 300 µC. The gate drivers are packaged and tested over a wide temperature range. Measured peak output current exceeds the 4 A source, 8 A sink current design goals at room temperature. The measured gate driver rise and fall times are 74.2 ns and 36.8 ns, respectively, while driving a SiC power MOSFET at a package temperature above 500 µC. Switching operation is demonstrated while at temperature.

An integrated SiC CMOS gate driver

In the last decade, significant effort has been expended towards the development of reliable, high-temperature integrated circuits Designs based on a variety of active semiconductor devices including junction field effect transistors and metal-oxide-semiconductor field effect transistors have been pursued and demonstrated More recently1,2, advances in low-power complementary MOS devices have enabled the development of highly-integrated digital, analog and mixed-signal integrated circuits The results of elevated temperature testing (as high as 500°C) for extended periods (up to 100 hours) of several building block circuits will be presented These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at these extreme temperatures for any period of time Based on these results, Venus nominal temperature (470°C) SPICE m°dels and gate-level timing models were created using parasitic extracted simulations

High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application

This paper details the design and performance of a delay-insensitive asynchronous 8-bit ALU for an asynchronous 8051-compliant microcontroller intended for extreme environments. The ALU was designed using a quasi-delay-insensitive logic called NULL Convention Logic (NCL), in order to allow for reliable circuit operation over a wide temperature range and enable extreme supply voltage scaling for low power consumption. The ALU was fabricated along with several other 8051-essential components at MOSIS using the IBM SiGe5AM 0.5 mum process. A series of tests at both room and cryogenic temperatures has been performed, which has demonstrated that the designed ALU is able to operate correctly from 2K (-271degC) to 297K (23degC), as well as over wide supply voltage variations.

https://www.ndsu.edu/pubweb/~scotsmit/ALU_cryo.pdf

M. Barlow

Papers

A SiC CMOS Linear Voltage Regulator for High-Temperature Applications

An Integrated SiC CMOS Gate Driver for Power Module Integration

An integrated SiC CMOS gate driver

High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application

Delay-insensitive asynchronous ALU for cryogenic temperature environments