Van der Waals heterostructure based on layered two-dimensional (2D) materials offers unprecedented opportunities to create materials with atomic precision by design. By combining superior properties of each component, such heterostructure also provides possible solutions to address various challenges of the electronic devices, especially those with vertical multilayered structures. Here, we report the realization of robust memristors for the first time based on van der Waals heterostructure of fully layered 2D materials (graphene/MoS2-xOx/graphene) and demonstrate a good thermal stability lacking in traditional memristors. Such devices have shown excellent switching performance with endurance up to 107 and a record-high operating temperature up to 340oC. By combining in situ high-resolution TEM and STEM studies, we have shown that the MoS2-xOx switching layer, together with the graphene electrodes and their atomically sharp interfaces, are responsible for the observed thermal stability at elevated temperatures. A well-defined conduction channel and a switching mechanism based on the migration of oxygen ions were also revealed. In addition, the fully layered 2D materials offer a good mechanical flexibility for flexible electronic applications, manifested by our experimental demonstration of a good endurance against over 1000 bending cycles. Our results showcase a general and encouraging pathway toward engineering desired device properties by using 2D van der Waals heterostructures.

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Robust memristors based on layered two-dimensional materials

Van der Waals heterostructures are formed by stacking layers of different two-dimensional materials and offer the possibility to design new materials with atomic-level precision. By combining the valuable properties of different 2D systems, such heterostructures could potentially be used to address existing challenges in the development of electronic devices, particularly those that require vertical multi-layered structures. Here we show that robust memristors with good thermal stability, which is lacking in traditional memristors, can be created from a van der Waals heterostructure composed of graphene/MoS2–xO
 x
 /graphene. The devices exhibit excellent switching performance with an endurance of up to 107 and a high operating temperature of up to 340 °C. With the help of in situ electron microscopy, we show that the thermal stability is due to the MoS2–xO
 x
 switching layer, as well as the graphene electrodes and the atomically sharp interface between the electrodes and the switching layer. We also show that the devices have a well-defined conduction channel and a switching mechanism that is based on the migration of oxygen ions. Finally, we demonstrate that the memristor devices can be fabricated on a polyimide substrate and exhibit good endurance against over 1,000 bending cycles, illustrating their potential for flexible electronic applications. Memristors that offer good thermal stability, which is lacking in traditional memristors, can be created from a van der Waals heterostructure composed of graphene/MoS2–xO
 x
 /graphene.

/pdf/robust-memristors-based-on-layered-two-dimensional-materials-4jut0qw14p.pdf

Owing to its energy efficiency, silicon complementary metal–oxide–semiconductor (CMOS) technology is the current driving force of the integrated circuit industry. Silicon’s narrow bandgap has led to the advancement of wide-bandgap semiconductor materials, such as gallium nitride (GaN), being favoured in power electronics, radiofrequency power amplifiers and harsh environment applications. However, the development of GaN CMOS logic circuits has proved challenging because of the lack of a suitable strategy for integrating n-channel and p-channel field-effect transistors on a single substrate. Here we report the monolithic integration of enhancement-mode n-channel and p-channel GaN field-effect transistors and the fabrication of GaN-based complementary logic integrated circuits. We construct a family of elementary logic gates—including NOT, NAND, NOR and transmission gates—and show that the inverters exhibit rail-to-rail operation, suppressed static power dissipation, high thermal stability and large noise margins. We also demonstrate latch cells and ring oscillators comprising cascading logic inverters. Through the monolithic integration of enhancement-mode n-type and p-type gallium nitride field-effect transistors, complementary integrated circuits including latch circuits and ring oscillators can be created for use in high-power and high-frequency applications.

Gallium nitride-based complementary logic integrated circuits

SiC MOSFETs are a leading option for increasing the power density of power electronics; however, for these devices to supersede the Si insulated-gate bipolar transistor, their characteristics have to be further understood. Two SiC vertically oriented planar gate D-MOSFETs rated for 1200 V/150 A were repetitively subjected to pulsed overcurrent conditions to evaluate their failure mode due to this common source of electrical stress. This research supplements recent work that demonstrated the long term reliability of these same devices [1] . Using an RLC pulse-ring-down test bed, these devices hard-switched 600 A peak current pulses, corresponding to a current density of 1500 A/cm2. Throughout testing, static characteristics of the devices such as $B_{{\rm VDSS}}$ , $R_{{\rm DS}({\rm on})}$ , and $V_{{\rm GS}({\rm th})}$ were measured with a high power device analyzer. The experimental results indicated that a conductive path was formed through the gate oxide; TCAD simulations revealed localized heating at the SiC/SiO2 interface as a result of the extreme high current density present in the device's JFET region. However, the high peak currents and repetition rates required to produce the conductive path through the gate oxide demonstrate the robustness of SiC MOSFETs under the pulsed overcurrent conditions common in power electronic applications.

Failure Analysis of 1200-V/150-A SiC MOSFET Under Repetitive Pulsed Overcurrent Conditions

This paper is an important step toward the development of complex integrated circuit (IC) control electronics that have to attend to high-temperature environment power applications. We present in premiere a prototype set of essential mixed-signal ICs on SiC capable of controlling power switches and a lateral power MESFET able to operate at high temperatures, all embedded on the same chip. Also, we report for the first time the functionality of standard Si-CMOS topologies on SiC for the master–slave data flip-flop (FF) and data-reset FF digital building blocks designed with MESFETs. Concretely, we present the complete development of SiC-MESFET IC circuitry, able to integrate gate drivers for SiC power devices. This development is based on the mature and stable Tungsten–Schottky interface technology used for the fabrication of stable SiC Schottky diodes for the European Space Agency Mission BepiColombo.

SiC Integrated Circuit Control Electronics for High-Temperature Operation

The need for dependable digital circuitry with the capability to operate reliably in high-temperature environments has been increasing drastically in applications such as automobile, aerospace, oil exploration, and power electronics. However, wide temperature swings significantly alter the threshold voltage of individual transistors, which adversely affects circuit timing in traditional synchronous designs. Such timing changes may in turn violates the setup and hold times of the clocked components, leading to potential circuit failure. This paper presents a complex digital integrated circuit design methodology using both synchronous and asynchronous logic for comparison in a young silicon carbide (SiC) design process developed by Raytheon UK. Seventeen circuits were designed, fabricated, and tested with results showing correct operation at temperatures at and above the target temperature of 300 °C.

Complex High-Temperature CMOS Silicon Carbide Digital Circuit Designs

The first SiC integrated circuit linear voltage regulator is reported. The voltage regulator uses a 20-V supply and generates an output of 15 V, adjustable down to 10 V. It was designed for loads of up to 2 A over a temperature range of 25-225 °C. It was, however, successfully tested up to 300 °C. The voltage regulator demonstrated load regulations of 1.49% and 9% for a 2-A load at temperatures of 25 and 300 °C, respectively. However, the load regulation is less than 2% up to 300 °C for a 1-A load. The line regulation with a 2-A load at 25 and 300 °C was 17 and 296 mV/V, respectively. The regulator was fabricated in a Cree 4H-SiC 2-μm experimental process and consists of 1000, 32/2-μm NMOS depletion MOSFETs as the pass device, an integrated error amplifier with enhancement MOSFETs, and resistor loads, and uses external feedback and compensation networks to ensure operational integrity. It was designed to be integrated with high-voltage vertical power MOSFETs on the same SiC substrate. It also serves as a guide to future attempts for voltage regulation in any type of integrated SiC circuitry.

A SiC CMOS Linear Voltage Regulator for High-Temperature Applications

This paper describes a high temperature voltage comparator and an operational amplifier (op-amp) in a 1.2- $\mu \text{m}$ silicon carbide (SiC) CMOS process. These circuits are used as building blocks for designing a high-temperature SiC low-side over current protection circuit. The over current protection circuit is used in the protection circuitry of a SiC FET gate driver in power converter applications. The op-amp and the comparator have been tested at 400 °C and 550 °C temperature, respectively. The op-amp has an input common-mode range of 0–11.2 V, a dc gain of 60 dB, a unity gain bandwidth of 2.3 MHz, and a phase margin of 48° at 400 °C. The comparator has a rise time and a fall time of 38 and 24 ns, respectively, at 550 °C. The over current protection circuit, implemented with these analog building blocks, is designed to sense a voltage across a sense resistor up to 0.5 V.

High-Temperature SiC CMOS Comparator and op-amp for Protection Circuits in Voltage Regulators and Switch-Mode Converters

This paper describes the simulation and test results of a family of analog and mixed signal circuits in silicon carbide CMOS technology at temperatures of 300°C and above. As SiC and wide bandgap devices in general grow in popularity for efficient and stable operation in high temperature and harsh environment applications, CMOS SiC integrated circuits can open up a new frontier of opportunity for miniaturization and system dependability. The building block circuits presented here can serve as the basis of rugged SiC system-on-chips for extreme environment applications.

A family of CMOS analog and mixed signal circuits in SiC for high temperature electronics

This paper presents a pair of high-temperature voltage and current references that have been designed in a silicon carbide CMOS process. The circuits presented have been fabricated in two fabrication runs and tested to 300 °C under probe and 540 °C in a packaged form. Test results over a single wafer at multiple sites are given to provide variation over process data. The circuits include a voltage reference with an accuracy of better than 100 ppm/°C and a constant current reference with a variation of $\pm 1~\mu \text{A}$ at a nominal output of 11 $\mu \text{A}$ from 25 °C to 540 °C.

Ashfaqur Rahman

Papers

Complex High-Temperature CMOS Silicon Carbide Digital Circuit Designs

A SiC CMOS Linear Voltage Regulator for High-Temperature Applications

High-Temperature SiC CMOS Comparator and op-amp for Protection Circuits in Voltage Regulators and Switch-Mode Converters

A family of CMOS analog and mixed signal circuits in SiC for high temperature electronics

High-Temperature Voltage and Current References in Silicon Carbide CMOS