There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

The organization of behavior: A neuropsychological theory

The Personal Interview

What is modal logic

IEEE transactions on computer-aided design of integrated circuits and systems : a publication of the IEEE Circuits and Systems Society

This paper introduces new linear reversible circuit synthesis methods for N wires and compares them to existing methods in the Linear Nearest-Neighbor (LNN) model. The motivation for this work is to improve synthesis translation for quantum computers whose circuits employ the LNN model such as forms of quantum dot and Nuclear Magnetic Resonance based architectures.

Linear Reversible Circuit Synthesis in the Linear Nearest-Neighbor Model

This paper introduces the concepts of PseudoKronecker Decision Diagrams (PKDDs) with Negated Edges, as well as F+ee Kronecker Decision Diagrams (FKDDs), that generalize both the well-known Binary Decision Diagmms and Functional Decision Diagmms, as well as Ihe recently introduced Ordered Kronecker Decision Diagrams (OKDDs . We give efficient algorithm for Ihe generation / o FKDDs for multi-output functions and show their application 20 FPGA mapping. On MCNC benchmarks we demon&ale Ihe advantage of FKDDs in terms of reduced number.9 of nodes (cells) and levels in Ihe circuit over Ihe OKDDs and Permuted RM ties. The mapping algorithm can be easily adopied lo other cellular FPGAS, especially those from Motorola.

/pdf/free-kronecker-decision-diagrams-and-their-application-to-513oik24cn.pdf

Free Kronecker decision diagrams and their application to Atmel 6000 series FPGA mapping

The generation of two new Walsh transforms in Gray code orderings from the straight binary code is shown. A recursive algorithm for Gray-code-ordered Walsh transforms is based on a novel operator called the bisymmetrical pseudo Kronecker product. The recursive algorithm is the basis for the flow diagram of a constant geometry fast Walsh transform in Gray code ordering. The algorithm is fast (N log/sub 2/ N additions/subtractions), is computer efficient, and is implemented in the iterative architecture. >

Algorithm and architecture for Gray code ordered fast Walsh transform

This paper presents a new algorithm MP (multiple pass) to synthesize large reversible binary circuits without ancilla bits. The well- known MMD algorithm for synthesis of reversible circuits requires to store a truth t able (or a Reed-Muller - RM transform) as a 2n vector to represent a reversible function of n variables. Th is rep- resentation prohibits synthesis of large functions. However, in MP we do not store such an exponentially growing data structure. The values of minterms are calculated in MP dynamically, one-by-one, from a set of logic equations that specify the re- versible circuit to be designed. This allows for synthesis o f large scale reversible circuits (30-bits), which is not possible with any existing algorithm. In addition, our unique multi-pass approach where the circuit is synthesized with various, yet specific, minterm orders yields quasi-optimal solution. The algorithm returns a description of the quasi-optimal circuit with respect to gate count or to it s "quantum cost". Although the synthesis process in MP is relatively slower, the soluti on is found in real-time for smaller circuits of 8 bits or less.

http://facta.junis.ni.ac.rs/eae/fu2k103/2marek.pdf

Synthesis of reversible circuits for large reversible functions

A direct algorithm for calculating Reed-Muller coefficients under each fixed polarity is derived. This algorithm has not only a simple procedure but also much lower computational cost than the step-by-step flow graph algorithm with the polarities in Gray code order of D.H. Green (1989). Therefore, it lends itself to fast parallel computation. >

Marek Perkowski

Papers

Linear Reversible Circuit Synthesis in the Linear Nearest-Neighbor Model

Free Kronecker decision diagrams and their application to Atmel 6000 series FPGA mapping

Algorithm and architecture for Gray code ordered fast Walsh transform

Synthesis of reversible circuits for large reversible functions

Fast synthesis for ternary Reed-Muller expansion