There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

The organization of behavior: A neuropsychological theory

The Personal Interview

What is modal logic

IEEE transactions on computer-aided design of integrated circuits and systems : a publication of the IEEE Circuits and Systems Society

Presents the automatic synthesis of microprogrammed control units in the DIADES design automation system. The optimization of the microcode is incorporated into a comprehensive process of data path scheduling and allocation and of control unit design. A new microprogrammed controller model that is suitable for design automation and formal description is described. This new model permits design and optimization of controllers ranging from a very basic microcontroller to a very complex one. The micro-sequencer architecture is retargetable. A symbolic intermediate microcode (SIMC) is generated as a high-level intermediate microassembly language. In SIMC, some high-level control constructs from the behavioral input language ADL of DIADES and GRAPH88 are preserved and can either be implemented in hardware or converted into lower-level microinstructions. An object-oriented HyperCard-based user interface has been designed to simplify user access to the system. >

http://ieeexplore.ieee.org/iel2/640/5938/00230391.pdf

Automated synthesis of microprogrammed control units in DIADES

A concurrent finite state machine (CFSM) is a network of finite state machines, with each FSM from the network having an arbitrary number of symbolic input and output ports that communicate to other FSMs and to the outside world. Such machines include, in particular, FSMs with counters, stacks, subroutine registers, encoders and decoders. Program AE, Assignment Expert, is described, which finds the encodings of input ports, output ports and internal states of the FSMs. It finds the solution to the constrained problem of simultaneous input/output/internal-state assignment of CFSMs. It is a two-pass method. A very fast modified quadratic assignment algorithm for graph embedding is first iterated several times, using different quality functions and realization-related cost functions. Next, the knowledge-based, rule-implemented, optimizing transformations are executed. To improve the results, the technology-related cost of the logic mapping is used in the optimization loop. This technique is particularly useful to implement large concurrent state machines realized using new types of programmable logic devices (PLDs). >

/pdf/the-encoding-program-for-concurrent-finite-state-machines-46x8tqsmuz.pdf

The encoding program for concurrent finite state machines realized using PLD devices

The difference between faults and errors is that, unlike faults, errors can be corrected using control codes. In classical test and verification one develops a test set separating a correct circuit from a circuit containing any considered fault. Classical faults are modelled at the logical level by fault models that act on classical states. The stuck fault model, thought of as a lead connected to a power rail or to a ground, is most typically considered. A classical test set complete for the stuck fault model propagates both binary basis states, 0 and 1, through all nodes in a network and is known to detect many physical faults. A classical test set complete for the stuck fault model allows all circuit nodes to be completely tested and verifies the function of many gates. It is natural to ask if one may adapt any of the known classical methods to test quantum circuits. Of course, classical fault models do not capture all the logical failures found in quantum circuits. The first obstacle faced when using methods from classical test is developing a set of realistic quantum-logical fault models. Developing fault models to abstract the test problem away from the device level motivated our study. Several results are established. First, we describe typical modes of failure present in the physical design of quantum circuits. From this we develop fault models for quantum binary circuits that enable testing at the logical level. The application of these fault models is shown by adapting the classical test set generation technique known as constructing a fault table to generate quantum test sets. A test set developed using this method is shown to detect each of the considered faults.

Fault Models for Quantum Mechanical Switching Networks

An efficient computer implementation of an originally developed spectral representation of multiple-valued input binary functions is presented. In such a representation, the spectrum for each multiple-valued input binary function is composed of a vector of Walsh transforms, each of which is defined for one pair of input variables of the function. By this approach, the number of spectral coefficients describing a given multiple-valued input binary function is the minimal one. The implementation of the algorithm allows for the calculation of the spectra of binary functions having an arbitrary number of literals, each of which can have up to 32 different logical values. The algorithm is interactive so users can, as needed, determine the generation of a partial or whole spectrum. >

An efficient computer algorithm for the calculation of Walsh transform for completely and incompletely specified multiple-valued input binary functions

We first introduce a method called quantum path verification, where we search for a break in a quantum network. After explaining these capabilities, we address gate internal faults. We present new fault models to represent crosstalk and unwanted nearest neighbor entanglement. When witnessed, these errors are probabilistic, but there is a set of tests that has the highest probability of detecting a fault. We introduce a method of probabilistic set covering to identify this set of tests. A large part of our work consisted of writing a software package that allows us to compare various fault models and test strategies.

/pdf/extending-classical-test-to-quantum-10crgey132.pdf

Marek Perkowski

Papers

Automated synthesis of microprogrammed control units in DIADES

The encoding program for concurrent finite state machines realized using PLD devices

Fault Models for Quantum Mechanical Switching Networks

An efficient computer algorithm for the calculation of Walsh transform for completely and incompletely specified multiple-valued input binary functions

Extending Classical Test to Quantum