There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

The organization of behavior: A neuropsychological theory

The Personal Interview

What is modal logic

IEEE transactions on computer-aided design of integrated circuits and systems : a publication of the IEEE Circuits and Systems Society

We present fast algorithms to synthesize exact minimal reversible circuits for various types of gates and costs. By reducing reversible logic synthesis problems to group theory problems, we use the powerful algebraic software GAP to solve such problems. Our algorithms are not only able to minimize for arbitrary cost functions of gates, but also orders of magnitude faster than the existing approaches to reversible logic synthesis. In addition, we show that the Peres gate is a better choice than the standard Toffoli gate in libraries of universal reversible gates.

/pdf/fast-synthesis-of-exact-minimal-reversible-circuits-using-3sp4woeym4.pdf

Fast synthesis of exact minimal reversible circuits using group theory

We introduce a Reversible Programmable Gate Array (RPGA) based on regular structure to realize binary functions in reversible logic. This structure, called a 2 * 2 Net Structure, allows for more efficient realization of symmetric functions than the methods shown by previous authors. In addition, it realizes many non-symmetric functions even without variable repetition. Our synthesis method to RPGAs allows to realize arbitrary symmetric function in a completely regular structure of reversible gates with smaller “garbage” than the previously presented papers. Because every Boolean function is symmetrizable by repeating input variables, our method is applicable to arbitrary multi-input, multi-output Boolean functions and realizes such arbitrary function in a circuit with a relatively small number of garbage gate outputs. The method can be also used in classical logic. Its advantages in terms of numbers of gates and inputs/outputs are especially seen for symmetric or incompletely specified functions with many outputs.

/pdf/regularity-and-symmetry-as-a-base-for-efficient-realization-3nsw6v9ewu.pdf

Regularity and Symmetry as a Base for Efficient Realization of Reversible Logic Circuits

A testable EXOR-Sum-of-Products (ESOP) circuit realization and a simple, universal test set which detects all single stuck-at faults in the internal lines and the primary inputs/outputs of the realization are given. Since ESOP is the most general form of AND-EXOR representations, our realization and test set are more versatile than those described by other researchers for the restricted GRM, FPRM, and PPRM forms of AND-EXOR circuits. Our circuit realization requires only two extra inputs for controllability and one extra output for observability. The cardinality of our test set for an n input circuit is (n+6). For Built-in Self-Test (BIST) applications, we show that our test set can be generated internally as easily as a pseudorandom pattern and that it provides 100 percent single stuck-at fault coverage. In addition, our test set requires a much shorter test cycle than a comparable pseudoexhaustive or pseudorandom test set.

/pdf/a-minimal-universal-test-set-for-self-test-of-exor-sum-of-4pdehkytxe.pdf

A minimal universal test set for self-test of EXOR-Sum-of-Products circuits

The fundamental concept of generalized orthonormal expansion, which generalizes the ring forms of the Shannon expansion to logic with multivalued (MV) inputs and standard trivial functions of an arbitrary number of variables, is introduced. Some applications of the generalized orthonormal expansion are presented, including several generalizations of canonical forms both known from the literature and new. These include a family of canonical tree circuits, which are considered for binary and multivalued input cases. They can be multilevel or flattened to two-level AND-EXOR circuits. >

The generalized orthonormal expansion of functions with multiple-valued inputs and some of its applications

http://web.cecs.pdx.edu/~mperkows/=PUBLICATIONS/PER/G2005/0511019.pdf

Marek Perkowski

Papers

Fast synthesis of exact minimal reversible circuits using group theory

Regularity and Symmetry as a Base for Efficient Realization of Reversible Logic Circuits

A minimal universal test set for self-test of EXOR-Sum-of-Products circuits

The generalized orthonormal expansion of functions with multiple-valued inputs and some of its applications

Synthesis of multi-qudit hybrid and d-valued quantum logic circuits by decomposition